MC14016B Datasheet, PDF (1/9 Pages) Motorola, Inc – Quad Analog Switch/Quad Multiplexer

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad Analog Switch/Quad
Multiplexer
The MC14016B quad bilateral switch is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
Each MC14016B consists of four independent switches capable of
controlling either digital or analog signals. The quad bilateral switch is used
in signal gating, chopper, modulator, demodulator and CMOS logic
implementation.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Linearized Transfer Characteristics
• Low Noise — 12 nV/√Cycle, f ≥ 1.0 kHz typical
• Pin–for–Pin Replacements for CD4016B, CD4066B (Note improved
transfer characteristic design causes more parasitic coupling
capacitance than CD4016)
• For Lower RON, Use The HC4016 High–Speed CMOS Device or The
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MC14066B
• This Device Has Inputs and Outputs Which Do Not Have ESD
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Protection. Antistatic Precautions Must Be Taken.}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _VDD
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Vin, Vout}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _lin
DC Supply Voltage
Input or Output Voltage (DC or Transient)
Input Current (DC or Transient),
per Control Pin
– 0.5 to + 18.0
V
– 0.5 to VDD + 0.5 V
± 10
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Isw Switch Through Current}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{PD Power Dissipation, per Packageâ€} 
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Tstg Storage Temperature}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _TL
Lead Temperature (8–Second Soldering)
± 25
mA
500
mW
– 65 to + 150
_C
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
LOGIC DIAGRAM
(1/4 OF DEVICE SHOWN)
OUT
CONTROL
LOGIC DIAGRAM RESTRICTIONS
IN
VSS ≤ Vin ≤ VDD
VSS ≤ Vout ≤ VDD
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
MC14016B
L SUFFIX
CERAMIC
CASE 632
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
BLOCK DIAGRAM
13
CONTROL 1
1
IN 1
5
CONTROL 2
4
IN 2
6
CONTROL 3
8
IN 3
12
CONTROL 4
11
IN 4
2
OUT 1
3
OUT 2
9
OUT 3
10
OUT 4
VDD = PIN 14
VSS = PIN 7
Control
0 = VSS
1 = VDD
Switch
Off
On
MC14016B
65