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MC14014B Datasheet, PDF (1/6 Pages) Motorola, Inc – 8-Bit Static Shift Register
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
8-Bit Static Shift Register
MC14014B
MC14021B
The MC14014B and MC14021B 8–bit static shift registers are constructed
with MOS P–channel and N–channel enhancement mode devices in a single
monolithic structure. These shift registers find primary use in parallel–to–
serial data conversion, synchronous and asynchronous parallel input, serial
output data queueing; and other general purpose register applications
requiring low power and/or high noise immunity.
L SUFFIX
CERAMIC
CASE 620
• Synchronous Parallel Input/Serial Output (MC14014B)
• Asynchronous Parallel Input/Serial Output (MC14021B)
• Synchronous Serial Input/Serial Output
• Full Static Operation
P SUFFIX
PLASTIC
CASE 648
• “Q” Outputs from Sixth, Seventh, and Eighth Stages
• Double Diode Input Protection
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
D SUFFIX
SOIC
CASE 751B
Schottky TTL Load Over the Rated Temperature Range
• MC14014B Pin–for–Pin Replacement for CD4014B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ • MC14021B Pin–for–Pin Replacement for CD4021B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS* (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ VDD DC Supply Voltage
– 0.5 to + 18.0
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ lin, lout Input or Output Current (DC or Transient),
± 10
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ per Pin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ PD Power Dissipation, per Package†
500
mW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Tstg Storage Temperature
– 65 to + 150
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ TL
Lead Temperature (8–Second Soldering)
260
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ * Maximum Ratings are those values beyond which damage to the device may occur.
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
TRUTH TABLE
SERIAL OPERATION:
Q6
t Clock DS P/S t=n+6
n
00
0
n+1
10
1
n+2
00
0
n+3
10
1
X 0 Q6
Q7
t = n+7
?
0
1
0
Q7
Q8
t = n+8
?
?
0
1
Q8
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
PARALLEL OPERATION:
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
Clock
MC14014B MC14021B DS P/S Pn *Qn
X
X 1 00
X
X 1 11
LOGIC DIAGRAM
* Q6, Q7, & Q8 are available externally
X = Don’t Care
9
P/S
P1
P2
P3
7
6
5
P6
P7
P8
14
15
1
11
DS
DQ
DQ
DQ
DQ
DQ
D
C
C
C
CQ
CQ
CQ
10
CLOCK
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
VDD = PIN 16 P4 = PIN 4
VSS = PIN 8 P5 = PIN 13
2
12
3
Q6
Q7
Q8
MC14014B MC14021B
51