MC10H125 Datasheet, PDF (1/4 Pages) ON Semiconductor – Quad MECL-to-TTL Translator

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad MECL-to-TTL Translator
The MC10H125 is a quad translator for interfacing data and control signals
between the MECL section and saturated logic section of digital systems. The
10H part is a functional/pinout duplication of the standard MECL 10K family
part, with 100% improvement in propagation delay, and no increase in
power–supply current.
Outputs of unused translators will go to low state when their inputs are left
open.
• Propagation Delay, 2.5 ns Typical • Voltage Compensated
• Improved Noise Margin 150 mV
• MECL 10K–Compatible
(Over Operating Voltage and Temperature Range)
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 5.0 V)
Power Supply (VEE = –5.2 V)
Input Voltage (VCC = 5.0 V)
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
VEE
VCC
VI
TA
Tstg
–8.0 to 0
Vdc
0 to +7.0
Vdc
0 to VEE
Vdc
0 to +75
°C
–55 to +150
°C
–55 to +165
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%; VCC = 5.0 V ± 5.0 %)
(See Note)
0°
25°
75°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Negative Power
Supply Drain
Current
IE
—
44
—
40
—
44
mA
Positive Power Supply
Drain Current
Input Current
Input Leakage Current
High Output Voltage
IOH = –1.0 mA
Low Output Voltage
IOL = +20 mA
High Input Voltage(1)
Low Input Voltage(1)
Short Circuit Current
Reference Voltage
Common Mode
Range (3)
ICCH
ICCL
IinH
ICBO
VOH
VOL
VIH
VIL
IOS
VBB
VCMR
—
63
—
63
—
—
40
—
40
—
—
225
—
145
—
—
1.5
—
1.0
—
2.5
—
2.5
—
2.5
63
mA
40
mA
145
µA
1.0
µA
—
Vdc
—
0.5
—
0.5
—
0.5
Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
–1.95 –1.48 –1.95 –1.48 –1.95
–1.45
Vdc
60
150
60
150
50
150
mA
–1.38 –1.27 –1.35 –1.25 –1.31
–1.19
Vdc
—
—
–2.85 to +0.3
V
Typical
Input Sensitivity (4)
VPP
150
mV
AC PARAMETERS
Propagation Delay
tpd
0.8
3.3
0.85
3.35
0.9
3.4
ns
Rise Time(5)
tr
0.3
1.2
0.3
1.2
0.3
1.2
ns
Fall Time(5)
tf
0.3
1.2
0.3
1.2
0.3
1.2
ns
NOTES:
1. When VBB is used as the reference voltage.
2. Each MECL 10H series circuit has been designed to meet the specifications shown in the test table, after thermal
equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse
air flow greater than 500 linear fpm is maintained.
3. Differential input not to exceed 1.0 Vdc.
W ^{4. 150 mVp–p differential input required to obtain full logic swing on output.}
5. 1.0 V to 2.0 V w/25 pF into 500 .
MC10H125
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
2
4
3
6
5
7
10
12
11
14
13
15
1
VBB*
GND = PIN 16
VCC ( +5.0 VDC)= PIN 9
VEE ( –5.2 VDC) = PIN 8
*VBB to be used to supply bias to the MC10H125
only and bypassed (when used) with 0.01 µF to
0.1 µF capacitor to ground (0 V). VBB can source
< 1.0 mA.
DIP
PIN ASSIGNMENT
VBB
1
AIN
2
AIN
3
AOUT
4
BOUT
5
BIN
6
BIN
7
VEE
8
16
GND
15
DIN
14
DIN
13
DOUT
12
COUT
11
CIN
10
CIN
9
VCC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
9/96
© Motorola, Inc. 1996
2–29
REV 6