English
Language : 

MC10ELT25 Datasheet, PDF (1/3 Pages) ON Semiconductor – Differential ECL to TTL Translator
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Differential ECL to TTL
Translator
The MC10ELT/100ELT25 is a differential ECL to TTL translator.
Because ECL levels are used a +5V, -5.2V (or -4.5V) and ground are
required. The small outline 8-lead SOIC package and the single gate of
the ELT25 makes it ideal for those applications where space,
performance and low power are at a premium. Because the mature
MOSAIC 1.5 process is used, low cost can be added to the list of
features.
The VBB output allows the ELT25 to also be used in a single-ended
input mode. In this mode the VBB output is tied to the IN input for a
non-inverting buffer or the IN input for an inverting buffer. If used the VBB
pin should be bypassed to ground via a 0.01µF capacitor.
The ELT25 is available in both ECL standards: the 10ELT is compatible
with MECL 10H logic levels while the 100ELT is compatible with ECL
100K logic levels.
• 2.6ns Typical Propagation Delay
• Differential ECL Inputs
• Small Outline SOIC Package
• 24mA TTL Outputs
• Flow Through Pinouts
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
VEE 1
D0 2
ECL
D0 3
8 VCC
TTL 7 Q0
6 NC
VBB 4
5 GND
MC10ELT25
MC100ELT25
8
1
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751-05
PIN DESCRIPTION
PIN
D
Q
VCC
VEE
VBB
GND
FUNCTION
Diff ECL Inputs
TTL Output
Positive Supply
Negative Supply
Reference Output
Ground
1/95
© Motorola, Inc. 1996
3–1
REV 2