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MC10212 Datasheet, PDF (1/5 Pages) Motorola, Inc – High Speed Dual 3-Input/3-Output OR/NOR Gate | |||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
High Speed Dual 3-Input/
3-Output OR/NOR Gate
The MC10212 is designed to drive up to six transmission lines simulâ
taneously. The multiple outputs of this device also allow the wire âORââing of
several levels of gating for minimization of gate and package count.
The ability to control three parallel lines with minimum propagation delay
from a single point makes the MC10212 particularly useful in clock distribution
applications where minimum clock skew is desired.
PD = 160 mW typ/pkg (No Load)
tpd = 1.5 ns typ (All Outputs Loaded)
tr, tf = 1.5 ns typ (20%â80%)
LOGIC DIAGRAM
4
5
3
6
2
7
12
9
13
10
14
11
VCC1 = PIN 1, 15
VCC2 = PIN 16
VEE = PIN 8
MC10212
L SUFFIX
CERAMIC PACKAGE
CASE 620â10
P SUFFIX
PLASTIC PACKAGE
CASE 648â08
FN SUFFIX
PLCC
CASE 775â02
DIP
PIN ASSIGNMENT
VCC1
1
AOUT
2
AOUT
3
AOUT
4
AIN
5
AIN
6
AIN
7
VEE
8
16
VCC2
15
VCC1
14
BOUT
13
BOUT
12
BOUT
11
BIN
10
BIN
9
BIN
Pin assignment is for DualâinâLine Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6â11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
3â192
REV 5
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