MC10170 Datasheet, PDF (1/4 Pages) Motorola, Inc – 9+2-Bit Parity Geverator/Checker

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
9+2-Bit Parity Generator/
Checker
The MC10170 is a 11–bit parity circuit, which is segmented into 9 data bits
and 2 control bits.
Output A generates odd parity on 9 bits; that is, Output A goes high for an
odd number of high logic levels on the bit inputs in only 2 gate delays.
The Control Inputs can be used to expand parity to larger numbers of bits
with minimal delay or can be used to generate even parity. To expand parity to
larger words, the MC10170 can be used with the MC10160 or other
MC10170’s. The MC10170 can generate both even and odd parity.
PD = 300 mW typ/pkg (No Load)
tpd = 2.5 ns typ(Control Inputs to B Output)
4.0 ns typ (Data Inputs to A Output)
6.0 ns typ (Data Inputs to B Output)
tr,tf = 2.0 ns typ (20%–80%)
CONTROL
INPUTS
13 HIGH
14 LOW
D0 3
D1 4
D2 5
D3 6
D4 7
D5 9
D6 10
D7 11
D8 12
LOGIC DIAGRAM
15 B
EVEN PARITY
2A
ODD PARITY
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
INPUTS
Sum of
D Inputs
at High Level
Even
Odd
OUTPUTS
Odd Parity Even Parity
Output A
Low
High
Output B
High
Low
MC10170
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
PIN ASSIGNMENT
VCC1
1
A
2
D0
3
D1
4
D2
5
D3
6
D4
7
VEE
8
16
VCC2
15
B
14
LOW
13
HIGH
12
D8
11
D7
10
D6
9
D5
9/96
© Motorola, Inc. 1996
3–103
REV 6