MC10162 Datasheet, PDF (1/4 Pages) ON Semiconductor – Binary to 1-8 Decoder (High)

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Binary to 1-8 Decoder (High)
The MC10162 is designed to convert three lines of input data to a
one–of–eight output. The selected output will be high while all other outputs are
low. The enable inputs, when either or both are high, force all outputs low.
The MC10162 is a true parallel decoder. No series gating is used internally,
eliminating unequal delay times found in other decoders.
This device is ideally suited for demultiplexer applications. One of the two
enable inputs is used as the data input, while the other is used as a data enable
input.
A complete mux/demux operation on 16 bits for data distribution is illustrated
in Figure 1 of the MC10161 data sheet.
PD = 315 ns typ/pkg (No Load)
tpd = 4.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
E0 2
E1 15
A7
B9
C 14
LOGIC DIAGRAM
6 Q0
5 Q1
4 Q2
3 Q3
13 Q4
12 Q5
11 Q6
10 Q7
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
INPUTS
TRUTH TABLE
OUTPUTS
E0 E1 C B A Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
L L LLL H L L L L L L L
L L L LH L H L L L L L L
L L LHL L L H L L L L L
L L L HH L L L H L L L L
L L HLL L L L L H L L L
L L HLH L L L L L H L L
L L HHL L L L L L L H L
L L HHH L L L L L L L H
H X XXX L L L L L L L L
X H XXX L L L L L L L L
MC10162
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
VCC1
1
E0
2
Q3
3
Q2
4
Q1
5
Q0
6
A
7
VEE
8
16
VCC2
15
E1
14
C
13
Q4
12
Q5
11
Q6
10
Q7
9
B
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
3–78
REV 5