MC10160 Datasheet, PDF (1/4 Pages) Motorola, Inc – 12-Bit parity Generator-Checker

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
12-Bit Parity Generator-Checker
The MC10160 consists of nine Exclusive-OR gates in a single package,
internally connected to provide odd parity checking or generation. Output goes
high when an odd number of inputs are high. Unconnected inputs are pulled to
low logic levels allowing parity detection and generation for less than 12 bits.
PD = 320 mW typ/pkg (No Load)
tpd = 5.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
3
4
5
6
7
9
2
10
11
12
13
14
VCC1 = PIN 1
15
VCC2 = PIN 16
VEE = PIN 8
INPUT
Sum of
High Level
Inputs
Even
Odd
OUTPUT
Pin 2
Low
High
MC10160
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
PIN ASSIGNMENT
VCC1
1
OUT
2
IN1
3
IN2
4
IN3
5
IN4
6
IN5
7
VEE
8
16
VCC2
15
IN12
14
IN11
13
IN10
12
IN9
11
IN8
10
IN7
9
IN6
9/96
© Motorola, Inc. 1996
3–69
REV 6