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MC10110 Datasheet, PDF (1/4 Pages) Motorola, Inc – Dual 3-Input/3-Output OR Gate | |||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 3-Input/3-Ouput OR
Gate
The MC10110 is designed to drive up to three transmission lines simulâ
taneously. The multiple outputs of this device also allow the wire âORââing of
several levels of gating for minimization of gate and package count.
The ability to control three parallel lines from a single point makes the
MC10110 particularly useful in clock distribution applications where minimum
clock skew is desired. Three VCC pins are provided and each one should be
used.
PD = 80 mW typ/pkg (No Load)
tpd = 2.4 ns typ (All Outputs Loaded)
tr, tf = 2.2 ns typ (20%â80%)
MC10110
L SUFFIX
CERAMIC PACKAGE
CASE 620â10
P SUFFIX
PLASTIC PACKAGE
CASE 648â08
LOGIC DIAGRAM
5
6
2
7
3
4
9
10
12
11
13
14
VCC1 = PIN 1, 15
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1
1
AOUT
2
AOUT
3
AOUT
4
AIN
5
AIN
6
AIN
7
VEE
8
16
VCC2
15
VCC1
14
BOUT
13
BOUT
12
BOUT
11
BIN
10
BIN
9
BIN
Pin assignment is for DualâinâLine Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6â36 of the Motorola MECL Data
Book (DL122/D).
9/96
© Motorola, Inc. 1996
3â40
REV 6
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