MC100ES6254 Datasheet, PDF (1/12 Pages) Motorola, Inc – 2.5/3.3V Differential LVPECL 2x2 Clock Switch and Fanout Buffer

Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order Number: MC100ES6254/D
Rev. 3, 05/2004
2.5/3.3V Differential LVPECL
2x2 Clock Switch and
Fanout Buffer
MC100ES6254
The Motorola MC100ES6254 is a bipolar monolithic differential 2x2 clock
switch and fanout buffer. Designed for most demanding clock distribution sys-
tems, the MC100ES6254 supports various applications that require to drive pre-
cisely aligned clock signals. The device is capable of driving and switching dif-
ferential LVPECL signals. Using SiGe technology and a fully differential archi-
tecture, the device offers superior digital signal characteristics and very low
clock skew error. Target applications for this clock driver are high performance
clock/data switching, clock distribution or data loopback in computing, network-
ing and telecommunication systems.
2.5/3.3 V DIFFERENTIAL
LVPECL 2x2
CLOCK SWITCH
AND FANOUT BUFFER
Features:
• Fully differential architecture from input to all outputs
• SiGe technology supports near-zero output skew
• Supports DC to 3GHz operation¹ of clock or data signals
• LVPECL compatible differential clock inputs and outputs
• LVCMOS compatible control inputs
• Single 3.3 V or 2.5 V supply
• 50 ps maximum device skew¹
• Synchronous output enable eliminating output runt pulse generation and
metastability
• Standard 32 lead LQFP package
• Industrial temperature range
FA SUFFIX
32-LEAD LQFP PACKAGE
CASE 873A
Functional Description
MC100ES6254 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC
up to 3.0 GHz. Typical applications for the MC100ES6254 are primary clock distribution, switching and loopback systems of
high-performance computer, networking and telecommunication systems, as well as on-board clocking of OC-3, OC-12 and OC-48
speed communication systems. Primary purpose of the MC100ES6254 is high-speed clock switching applications. In addition, the
MC100ES6254 can be configured as single 1:6 or dual 1:3 LVPECL fanout buffer for clock signals, or as loopback device in high-
speed data applications.
The MC100ES6254 can be operated from a 3.3 V or 2.5 V positive supply without the requirement of a negative supply line.
1 The device is functional up to 3 GHz and characterized up to 2.7 GHz.
REV 3
© Motorola, Inc. 2004
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