DSP56L002 Datasheet, PDF (1/3 Pages) Motorola, Inc – 24-bit Digital Signal Processor

Freescale Semiconductor, Inc.
MOTOROLA
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DSP56002P/D
SEMICONDUCTOR
PRODUCT INFORMATION
DSP56002
DSP56L002
Product Brief
24-bit Digital Signal Processor
The DSP56002 and the DSP56L002 are MPU-style general purpose Digital Signal Processors
(DSPs), composed of an efficient 24-bit digital signal processor core, program and data memories,
various peripherals, and support circuitry. The 56000-Family-compatible DSP core is fed by on-
chip program RAM, two independent data RAMs, and two data ROMs with sine and A-law and
µ-law tables. The DSP56002/L002 contains a Serial Communication Interface (SCI), Synchronous
Serial Interface (SSI), parallel Host Interface (HI), Timer/Event Counter, Phase-Locked Loop
(PLL), and On-chip Emulation (OnCE™) port. This combination of features, illustrated in Figure 1,
makes the DSP56002/L002 a cost-effective, high-performance solution for high-precision general-
purpose digital signal processing.
1
6
3
15
16-bit Bus
24-bit Bus
24-bit
Timer /
Event
Counter
Sync.
Serial
(SSI)
or I/O
Serial Host
Comm. Interface
(SCI)
(HI)
or I/O or I/O
Program
Memory
512 × 24 RAM
64 × 24 ROM
(boot)
X Data
Memory
256 × 24 RAM
256 × 24 ROM
(A-law / µ-law)
Y Data
Memory
256 × 24 RAM
256 × 24 ROM
(sine)
24-bit
56000 DSP
Core
Internal
Data
Bus
Switch
Address
Generation
Unit
PAB
XAB
YAB
GDB
PDB
XDB
YDB
OnCE^TM Port
Clock
PLL
Gen.
Interrupt
Control
Program
Decode
Controller
Program
Address
Generator
Program Control Unit
7
4
3
IRQ
Data ALU
24 × 24 + 56 → 56-bit MAC
Two 56-bit Accumulators
Figure 1 DSP56002/L002 Block Diagram
Motorola reserves the right to change or discontinue this product without notice.
© MOTOROLA INC., 1994
For More Information On This Product,
Go to: www.freescale.com
External
Address
Bus
Switch
Address
16
External
Data
Bus
Switch
Data
24
Bus
Control
Control
10