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DSP56857PB Datasheet, PDF (1/2 Pages) Motorola, Inc – 120 MIPS Hybrid Processor
Freescale Semiconductor, Inc.
HYBRID MCU/DSP
56857
120 MIPS Hybrid Processor
TARGET APPLICATIONS
• Multi-processor Telephony
Systems
• Stand-alone MP3 player
• DTAD
• Feature phone
• Voice recognition and command
• Embedded modem/data pump
• LCD and keypad support
• General purpose devices
• Automotive hands-free
The 56857 offers a rich feature set and on-chip
memory in a 100-pin LQFP. It includes 80 KB of
on-chip program SRAM and 48 KB of on-chip data
SRAM. With two enhanced serial synchronous
serial interfaces (ESSIs), this device can provide
outputs for 5.1-channel surround sound. The 56857
can be designed into multi-processor systems to
provide internet audio and speech processing
functionalities.
COP/Watchdog
Program Memory
6-channel DMA
80 KB SRAM
Prog Chip Selects
2 KB Boot ROM
Up to 47 GPIO
16-Bit Quad Timer
Time of Day
56800E Core
120 MIPS
Data Memory
PLL
JTAG/EOnCE
48 KB SRAM
SPI
(2) SCI
(2) ESSI
8-Bit Host
BENEFITS
• Easy to program with flexible
application development tools
• Supports multiple processor
connections
• 16-bit quad timer module (with four
external pins) that allows
capture/compare functionality, and can
be cascaded
• Quad timer module can also be used for
simple digital-to-analog conversion
functionality
• Enhanced synchronous serial interface
with enhanced network and audio modes
• Time of Day for applications requiring
clock display
• Flexible 6-Channel Direct Memory
Access (DMA) allows both internal and
external memory transfers with almost
no CPU interruption
• Serial peripheral interface with master
and slave mode supporting connection
to other processors or serial memory
devices
• Two enhanced synchronous serial
interfaces with three transmitters per
module provide support for
5.1 channel surround sound for audio
applications
56857 16-BIT DIGITAL SIGNAL PROCESSORS
• 120 MIPS at 120MHz
• 80 KB Program SRAM
• 48 KB Data SRAM
• 2 KB Boot ROM
• Six independent channels of DMA
• Two Enhanced Synchronous Serial
Interfaces (ESSI)
• Two Serial Communication Interfaces
(SCI)
• Serial Peripheral Interface (SPI)
• Four dedicated GPIO
• 8-bit parallel Host Interface
• General purpose 16-bit Quad Timer
• JTAG/Enhanced On-Chip Emulation
(OnCE™) for unobtrusive, real-time
debugging
• Computer Operating Properly
(COP)/Watchdog Timer
• Time of Day (TOD)
• 100-pin LQFP package
• Up to 47 GPIO
ENERGY INFORMATION
• Fabricated in high-density CMOS with
3.3V, TTL-compatible digital inputs
• Wait and Stop modes available
For More Information On This Product,
Go to: www.freescale.com