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AN1687 Datasheet, PDF (1/12 Pages) Motorola, Inc – A FULL-FEATURED WIRELESS INTERFACE FOR RS-232 COMMUNICATIONS
MOTOROLA
ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005
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SEMICONDUCTOR APPLICATION NOTE
by AN1687/D
AN1687
A FULL-FEATURED WIRELESS INTERFACE FOR
RS-232 COMMUNICATIONS
Prepared by; Paul Sofianos
Motorola, Inc., WSSG RF/IF Applications Engineering
INTRODUCTION
This application note describes a full–duplex, wireless
data communication link targeted for RS–232 applications.
An encoding technique has been designed which addresses
many of the problems incurred when attempting to implement
the RS–232 (EIA–232) standard, including but not limited to:
hardware flow control, the DC component of the transmitted
signal, automatic synchronization from host to slave and
error detection. The design emulates a RS–232 null modem
cable for computer–to–computer communications.
The actual design was realized with standard SSI logic
from the high speed CMOS family (MC74HCxxx), an HC05
based MCU, and Motorola’s ISM Band RF chipset. The
targeted data rate was 57,600 Baud, although both higher
and lower data rates are easily attainable. It is expected that
most applications would embed the logic functions (and
possibly the MCU functions) into a FPGA, CPLD, ASIC, or
other LSI logic building block.
Throughout this application note, it is assumed the user is
familiar with standard TTL–compatible CMOS devices and
the ISM Band RF chipset. Please refer to DL110/D and
DL129/D for additional details on individual device
specifications.
THE WIRELESS LINK
The actual implementation of the wireless link transceiver
was accomplished with the Motorola’s ISM Band RF chipset.
This consists of a MC13145 RF Receiver, MC13146 RF
Transmitter and MC33411 Baseband. Figure 1 depicts the
block diagram of the RF transceiver. Figures 2, 3, and 4 are
the actual schematics for the Receiver, Transmitter, and
Baseband, respectively.
The transceiver was designed to operate in the unlicensed
(i.e. FCC Part 15) 902–928 MHz Industrial, Scientific and
Medical (ISM) band with low–power transmission. Since
direct–conversion FSK modulation is used in conjunction
with a PLL synthesized carrier, the digital modulation source
must meet certain requirements:
1. The DC component should be as close to zero as
possible. This maintains the best noise immunity at the
receiver.
2. A minimum frequency component must be maintained at
all times. If this condition is not met, the transmitter’s PLL
and receiver’s coilless demodulator will tend to
“track–out” the modulating signal.
3. The maximum frequency component should be known.
This will help define the modulation index and total
bandwidth required for the transceiver.
4. The system should be able to tolerate reasonable
bit–errors.
The MC33411 baseband controls all of the synthesizer
functions via a MCU SPI compatible interface. None of the
audio processing capabilities of the device are used. Table 1
lists various MC33411 register values for both baseset and
handset for the 5 channels used for the prototype.
Antenna
TXD
ENB
DATA
DCK
RCD
Figure 1. RF Transceiver
Block Diagram
Receiver
Baseband
RF In
DETO
LO2
FRX
RXMC
RXPD
RSSI
DETI
LO2
FRX
RXMC
RXPD
RSSI
Transmitter
RF Out
FTX
TXD
TXMC
TXPD
FTX
TXMC
TXPD
ENB
DATA
DCK
RCD
REV 1
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