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74LS77 Datasheet, PDF (1/4 Pages) Motorola, Inc – 4-BIT D LATCH LOW POWER SCHOTTKY | |||
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4-BIT D LATCH
The TTL/MSI SN54 / 74LS75 and SN54 / 74LS77 are latches used as tem-
porary storage for binary information between processing units and input /out-
put or indicator units. Information present at a data (D) input is transferred to
the Q output when the Enable is HIGH and the Q output will follow the data
input as long as the Enable remains HIGH. When the Enable goes LOW, the
information (that was present at the data input at the time the transition oc-
curred) is retained at the Q output until the Enable is permitted to go HIGH.
The SN54 / 74LS75 features complementary Q and Q output from a 4-bit
latch and is available in the 16-pin packages. For higher component density
applications the SN54 / 74LS77 4-bit latch is available in the 14-pin package
with Q outputs omitted.
CONNECTION DIAGRAMS DIP (TOP VIEW)
Q0 Q1 Q1 E0â1 GND Q2 Q2 Q3
16 15 14 13 12 11 10 9
SN54 / 74LS75
1 2 3 4 56 78
Q0 D0 D1 E2â3 VCC D2 D3 Q3
Q0 Q1 E0â1 GND NC Q2 Q3
14 13 12 11 10 9 8
SN54 / 74LS77
1234567
D0 D1 E2â3 VCC D2 D3 NC
PIN NAMES
LOADING (Note a)
HIGH
LOW
D1âD4
E0â1
E2â3
Q1âQ4
Q1âQ4
Data Inputs
Enable Input Latches 0, 1
Enable Input Latches 2, 3
Latch Outputs (Note b)
Complimentary Latch Outputs (Note b)
0.5 U.L.
2.0 U.L.
2.0 U.L.
10 U.L.
10 U.L.
0.25 U.L.
1.0 U.L.
1.0 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a) 1 Unit Load (U.L.) = 40 µA HIGH.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
TRUTH TABLE
(Each latch)
tn
tn + 1
D
Q
H
H
L
L
NOTES:
tn = bit time before enable
negative-going transition
tn+1 = bit time after enable
negative-going transition
SN54/74LS75
SN54/74LS77
4-BIT D LATCH
LOW POWER SCHOTTKY
16
1
16
1
16
1
14
1
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
D SUFFIX
SOIC
CASE 751B-03
J SUFFIX
CERAMIC
CASE 632-08
14
1
14
1
N SUFFIX
PLASTIC
CASE 646-06
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
SN54LSXXJ
SN74LSXXN
SN74LSXXD
Ceramic
Plastic
SOIC
FAST AND LS TTL DATA
5-1
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