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2N7002LT1 Datasheet, PDF (1/6 Pages) Motorola, Inc – CASE 318-08, STYLE 21 SOT-23 (TO-236AB)
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by 2N7002LT1/D
TMOS FET Transistor
N–Channel Enhancement
3 DRAIN
2N7002LT1
Motorola Preferred Device
1
GATE
2 SOURCE
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Drain Current — Continuous TC = 25°C(1)
Drain Current — Continuous TC = 100°C(1)
Drain Current — Pulsed(2)
VDSS
VDGR
ID
ID
IDM
Gate–Source Voltage
— Continuous
— Non–repetitive (tp ≤ 50 µs)
VGS
VGSM
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation FR–5 Board,(3) TA = 25°C
Derate above 25°C
60
60
± 115
± 75
± 800
± 20
± 40
Vdc
Vdc
mAdc
Vdc
Vpk
Symbol
PD
Thermal Resistance, Junction to Ambient
Total Device Dissipation
Alumina Substrate,(4) TA = 25°C
Derate above 25°C
RθJA
PD
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
DEVICE MARKING
RθJA
TJ, Tstg
2N7002LT1 = 702
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0, ID = 10 µAdc)
V(BR)DSS
Zero Gate Voltage Drain Current
(VGS = 0, VDS = 60 Vdc)
TJ = 25°C
TJ = 125°C
IDSS
Gate–Body Leakage Current, Forward
(VGS = 20 Vdc)
IGSSF
Gate–Body Leakage Current, Reverse
(VGS = – 20 Vdc)
IGSSR
1. The Power Dissipation of the package may result in a lower continuous drain current.
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.
3. FR–5 = 1.0 x 0.75 x 0.062 in.
4. Alumina = 0.4 x 0.3 x 0.025 in 99.5% alumina.
3
1
2
CASE 318 – 08, STYLE 21
SOT– 23 (TO – 236AB)
Max
225
1.8
556
300
2.4
417
– 55 to +150
Unit
mW
mW/°C
°C/W
mW
mW/°C
°C/W
°C
Min
Typ
Max
Unit
60
—
—
Vdc
—
—
1.0
µAdc
—
—
500
—
—
100
nAdc
—
—
–100
nAdc
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
1
© Motorola, Inc. 1997