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V29C51000T Datasheet, PDF (3/16 Pages) Mosel Vitelic, Corp – 512K BIT 65,536 x 8 BIT 5 VOLT CMOS FLASH MEMORY
MOSEL VITELIC
Functional Block Diagram
X-Decoder
V29C51000T/V29C51000B
65,536 Bit
Memory Cell Array
A0–A15
Address buffer & latches
Y-Decoder
CE
OE
Control Logic
WE
I/O Buffer & Data Latches
I/O0–I/O7
51001-05
Capacitance (1,2)
Symbol Parameter
CIN
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
NOTE:
1. Capacitance is sampled and not 100% tested.
2. TA = 25°C, VCC = 5V ± 10%, f = 1 MHz.
Latch Up Characteristics(1)
Test mSetup
VIN = 0
VOUT = 0
VIN = 0
Typ.
6
8
8
Max.
8
12
10
Units
pF
pF
pF
Parameter
Input Voltage with Respect to GND on A9, OE
Input Voltage with Respect to GND on I/O, address or control pins
VCC Current
NOTE:
1. Includes all pins except VCC. Test conditions: VCC = 5V, one pin at a time.
Min.
-1
-1
-100
Max.
+13
VCC + 1
+100
Unit
V
V
mA
AC Test Load
Device Under
Test
CL = 100 pF
+5.0 V
IN3064
or Equivalent
2.7 kΩ
6.2 kΩ
IN3064 or Equivalent
IN3064 or Equivalent
IN3064 or Equivalent
51001-06
V29C51000T/V29C51000B Rev. 0.5 October 2000
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