V53C318165A Datasheet, PDF (1/18 Pages) Mosel Vitelic, Corp – 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM

MOSEL VITELIC
V53C318165A
3.3 VOLT 1M X 16 EDO PAGE MODE
CMOS DYNAMIC RAM
HIGH PERFORMANCE
Max. RAS Access Time, (t_RAC)
Max. Column Address Access Time, (t_CAA)
Min. Extended Data Out Page Mode Cycle Time, (t_PC)
Min. Read/Write Cycle Time, (t_RC)
50
50 ns
25 ns
20 ns
84 ns
60
60 ns
30 ns
25 ns
104 ns
70
70 ns
35 ns
30 ns
124 ns
Features
s 1M x 16-bit organization
s EDO Page Mode for a sustained data rate
of 50 MHz
s RAS access time: 50, 60, 70 ns
s Dual CAS Inputs
s Low power dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, Hidden Refresh, and
Self Refresh.
s Refresh Interval: 1024 cycles/16 ms
s Available in 42-pin 400 mil SOJ and 50/44-pin
400 mil TSOP-II
s Single +3.3 V ±0.3 V Power Supply
s TTL Interface
Description
The V53C318165A is a 1048576 x 16 bit high-
performance CMOS dynamic random access mem-
ory. The V53C318165A offers Page mode opera-
tion with Extended Data Output. The V53C318165A
has an symmetric address, 10-bit row and 10-bit
column.
All inputs are TTL compatible. EDO Page Mode
operation allows random access up to 1024 x 16
bits, within a page, with cycle times as short as
20ns.
These features make the V53C318165A ideally
suited for a wide variety of high performance com-
puter systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
0°C to 70 °C
Package Outline
K
T
•
•
Access Time (ns)
50
60
70
•
•
•
Power
Std.
•
V53C318165A Rev. 1.0 January 1998
1
Temperature
Mark
Blank