MS7200L Datasheet, PDF (1/11 Pages) Mosel Vitelic, Corp – 256 x 9, 512 x 9, 1K x 9 CMOS FIFO

MOSEL VITELIC
MS7200L/7201AL/7202AL
256 x 9, 512 x 9, 1K x 9
CMOS FIFO
MS7200L/7201AL/7202AL
Features
s First-In/First-Out static RAM based dual port
memory
s Three densities in a x9 configuration
s Low power versions
s Includes empty, full, and half full status flags
s Direct replacement for industry standard
Mostek and IDT
s Ultra high-speed 30 MHz FIFOs available with
33 ns cycle times.
s Fully expandable in both depth and width
s Simultaneous and asynchronous read and write
s Auto retransmit capability
s TTL compatible interface, single 5V ± 10%
power supply
s Available in 28 pin 300 mil and 600 mil plastic
DIP, 32 Pin PLCC and 330 mil SOG
Pin Configurations
28-PIN PDIP
W
1
28
D8
2
27
D3
3
26
D2
4
25
D1
5
24
D0
6
23
300 mil
XI
7
600 mil 22
DIP
FF 8
&
21
330 mil
Q0 9
SOG
20
Q1
10
19
Q2
11
18
Q3
12
17
Q8
13
16
GND
14
15
V_CC
D4
D5
D6
D7
FL / RT
RS
EF
XO / HF
Q7
Q6
Q5
Q4
R
W
32-PIN PLCC
4 3 2 1 32 31 30
D2 5
29 D6
R
D1 8
28 D7
D0 7
27 NC
XI 8
FF 9
32 Pin PLCC
Top View
26 FL / RT
25 RS
Q0 10
24 EF
Q1 11
23 XO / HF
NC 14
22 Q7
Q2 13
21 Q6
14 15 16 17 18 19 20
XI
Descriptions
The MS7200L/7201AL/7202AL are dual-port
static RAM based CMOS First-In/First-Out (FIFO)
memories organized in nine-bit wide words. The
devices are configured so that data is read out in
the same sequential order that it was written in.
Additional expansion logic is provided to allow for
unlimited expansion of both word size and depth.
The dual-port RAM array is internally sequenced
by independent Read and Write pointers with no
external addressing needed. Read and write
operations are fully asynchronous and may occur
simultaneously, even with the device operating at
full speed. Status flags are provided for full, empty,
and half-full conditions to eliminate data underflow
and overflow. The x9 architecture provides an
additional bit which may be used as a parity or
control bit. In addition, the devices offer a retransmit
capability which resets the Read pointer and allows
for retransmission from the beginning of the data.
The MS7200L/7201AL/7202AL are available in a
range of frequencies from 10 to 30 MHz (33 - 100 ns
cycle times). A low power version with a 500µA
power down supply current is available. They are
manufactured on Mosel-Vitelic’s high performance
1.2µ CMOS process and operate from a single 5V
power supply.
Block Diagram
DATA INPUTS (Q0-Q8)
WRITE
CONTROL
WRITE
POINTER
RAM
ARRAY
256x9
512x9
1Kx9
READ
POINTER
READ
CONTROL
FLAG
LOGIC
EXPANSION
LOGIC
THREE
STATE
BUFFERS
DATA OUTPUTS (Q0-Q8)
RESET
LOGIC
EF
HF
FF
RS
FL / RT
XO
MS7200L/01AL/02AL Rev. 1.0 January 1995
1