MSM8128 Datasheet, PDF (1/10 Pages) MOSAIC – 128K x 8 SRAM

TRAILING EDGE PRODUCT - MINIMUM ORDER APPLIES
PRODUCT MAY BE MADE OBSOLETE WITHOUT NOTICE
128K x 8 SRAM
MSM8128 - 70/85/10/12
Elm Road, West Chirton, NORTH SHIELDS, Tyne & Wear
NE29 8SE, England Tel. [phone] Fax. [phone]
Issue 4.5: April 2001
Description
The MSM8128 is a 1Mbit monolithic SRAM
organised as 128K x 8. It is currently available
in a VIL Package, with access times of 70, 85,
100, 120ns. It has a low power standby version
and has 3.0V battery backup capability. It is
directly TTL compatible and has common data
inputs and outputs.
Two pinout variants (single and dual CS) are
available.
All versions may be screened in accordance with
MIL-STD-883.
131,072 x 8 CMOS Static RAM
Features
Access Times of 70/85/100/120 ns
JEDEC standard Dual CS footprints.
Operating Power
550 mW (max)
Low Power Standby (-L) 2.2 mW (max)
Low Voltage Data Retention.
Completely Static Operation
Directly TTL compatible.
May be processed in accordance with MIL-STD-883
Block Diagram
MEMORY ARRAY
512 X 2048
Pin Definition
NC 1
32 VCC
A16 2
31 A15
A14 3
30 CS2
A12 4
29 WE
A7 5
28 A13
A6 6
27 A8
A5 7
26 A9
A4 8 TOP VIEW 25 A11
A3 9 ^S,V 24 OE
A2 10
23 A10
A1 11
22 CS1
A0 12
21 D7
D0 13
20 D6
D1 14
19 D5
D2 15
18 D4
GND 16
17 D3
Package Details
Pin Count Description
32
0.1" Vertical-in-LIne (VIL^TM)
Package details on pages 8 & 9.
Package Type
V
See Page 9 for VX
Pin Functions
A0-A16
D0-7
CS1
CS2
OE
WE
NC
V_CC
GND
Address Inputs
Data Input/Output
Chip Select 1
Chip Select 2
Output Enable
Write Enable
No Connect
Power (+5V)
Ground