IM831B Datasheet, PDF (1/9 Pages) MMD Components – MEMS Oscillator, -55°C to +125°C, LVCMOS/HCMOS Compatible, 119.342001 MHz to 137.000MHz

MEMS Oscillator, -55°C to +125°C, LVCMOS/HCMOS Compatible, 119.342001 MHz to 137.000MHz
IM831 Series
Features:
 MEMS Technology
 Direct pin to pin drop-in replacement for industry-standard packages
 Ultra-low phase jitter: 0.5 pSec (12 kHz to 20 MHz)
 LVCMOS/HCMOS Compatible Output
 Industry-standard package 2.0 x1.6, 2.5 x 2.0, 3.2 x 2.5, and 5.0 x 3.2 mm x mm
 Pb-free, RoHS and REACH compliant
 Fast delivery times
Typical Applications:
 Fibre Channel
 Server and Storage
 GPON, EPON
 100M / 1G /10G Ethernet
 Ruggedized equipment in
harsh operating environment
Electronic Specifications:
Frequency Range
119.342001 MHz to 137.000MHz
Frequency Stability
See Part Number Guide
Inclusive of Operating Temperature Range, Load, Voltage, and Aging
Operating Temperature
-55°C of +125°C
Supply Voltage (Vdd) ±10% See Part Number Guide
Current Consumption
6.2 mA typ./ 8.0 mA max
5.4 mA typ./ 7.0 mA max
4.9 mA typ./ 6.0 mA max
No load condition, f = 125 MHz, Vdd = +2.8 V, +3.0 V or +3.3 V
No load condition, f = 125 MHz, Vdd = +2.5 V
No load condition, f = 125 MHz, Vdd = +1.8 V
OE Disable Current
4.7 mA max
4.5 mA max
Vdd = +2.5 V, or +3.3 V, OE = Low, output is high Z state
Vdd = +1.8 V, OE = Low, output is high Z state
Standby Current
2.6 µA typ./ 8.5 µA max
1.4 µA typ./ 5.5 µA max
0.6 µA typ./ 4.0 µA max
Vdd = +2.8 V to 3.3 V, ST = low
Vdd = +2.5 V, ST = Low
Vdd = +1.8 V, ST = Low
Waveform Output
LVCMOS/HCMOS
Symmetry
45%/55%
50% of waveform
Rise / Fall Time
1.0 nSec typ./ 2.0 nSec max
1.3 nSec typ./ 2.5 nSec max
Vdd = +2.5 V, +2.8 V, 3.0 V or 3.3 V from 20% to 80% of waveform
Vdd = +1.8 V, from 20% to 80% of waveform
Logic “1”
90% of Vdd min
Logic “0”
10% of Vdd max
Input Voltage High
70% of Vdd min
Pin 1, OE or ST
Input Voltage Low
30% of Vdd max
Pin 1, OE or ST
Input Pull-up Impedance
50 kΩ min/ 87 kΩ typ./150 kΩ max, Pin 1, OE logic high or logic low, or ST logic high
2.0 MΩ min
Pin 1, ST logic low
Startup Time
5 mSec max
Measured from the time Vdd reaches its rated minimum values
Enable/Disable Time
130 nSec max
F = 119.342001 MHz. For other frequencies, T_oe = 100 ns + 3 *
clock periods
Resume Time
5 mSec max
Measured from the time ST pin crosses 50% threshold.
RMS Period Time
1.6 pSec typ./ 2.5 pSec max
1.8 pSec typ./ 3.0 pSec max
F = 125 MHz, Vdd = +2.5 V, +2.8 V, +3.0 V or +3.3 V
F = 125 MHz, Vdd = +1.8 V
Peak-to-Peak Period Jitter
12 pSec typ./ 20 psec max
14 pSec typ./ 25 pSec max
F = 125 MHz, Vdd = +2.5 V, +2.8 V, +3.0 V or +3.3 V
F = 125 MHz, Vdd = +1.8 V
RMS Period Time (random) 0.5 pSec typ./ 0.8 pSec max
1.3 pSec typ./ 2.0 pSec max,
F = 125 MHz, Integration bandwidth = 900 kHz to 7.5 MHz
F = 125 MHz, Integration bandwidth = 12.0 kHz to 20.0 MHz
Notes:
 All min and max limits are specified over temperature and rated operating voltage with 15pF output unless otherwise stated.
 Typical values are at +25ºC and nominal supply voltage.
ILSI America Phone [phone] ● Fax [phone] ●email: [e-mail] ●
www.ilsiamerica.com
Specifications subject to change without notice
Rev 01/30/16_A
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