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MF365A-J9CATXX Datasheet, PDF (9/14 Pages) Mitsubishi Electric Semiconductor – 8/16-bit Data Bus Static RAM Card
Write Cycle (CE# control)
VIH
An
VIL
VIH
CE#
VIL
VIH
WE#
VIL
VIH
Dm
(DIN) VIL
tSU(A)
Hi-Z
MITSUBISHI MEMORY CARD
STATIC RAM CARDS
tCW
tSU(CE-WEH)
trec(WE)
t(D-WEH)
th(D)
DATA INPUT STABLE
OE#=“H” level
REG#=“H” level
17. SWITCHING CHARACTERISTICS (Attribute)
Read Cycle (Ta=0~55°C, Vcc=5V±5%, unless otherwise noted)
Symbol
Parameter
tcRR
ta(A)R
ta(CE)R
ta(OE)R
tdis(CE)R
tdis(OE)R
ten(CE)R
ten(OE)R
tV(A)R
Read cycle time
Address access time
Card enable access time
Output enable access time
Output disable time (from CE#)
Output disable time (from OE#)
Output enable time (from CE#)
Output enable time (from OE#)
Data valid time after address change
Limits
Unit
Min. Max.
300
ns
300 ns
300 ns
150 ns
100 ns
100 ns
5
ns
5
ns
0
ns
MITSUBISHI
ELECTRIC
9/14
Apr. 1999 Rev. 1.1