M81738FP Datasheet, PDF (9/12 Pages) Mitsubishi Electric Semiconductor – 1200V HIGH VOLTAGE HALF BRIDGE DRIVER

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M81738FP
1200V HIGH VOLTAGE HALF BRIDGE DRIVER
PRELIMINARY
8. ACTIVE MILLER EFFECT CLAMP NMOS OUTPUT TIMING DIAGRAM
The structure of the output driver stage is shown in following figure. This circuit structure employs a solution for the problem of the
Miller current through Cres in IGBT switching applications. Instead of driving the IGBT gate to a negative voltage to increase the
safety margin, this circuit structure uses a NMOS to establish a low impedance path to prevent the self-turn-on due to the parasitic
Miller capacitor in power switches.
VBS/VCC
VIN=0
(from HIN/LIN)
Cres
VOUT
Cies
high dv/dt
VS/VNO
Active Miller clamp NMOS
When HIN/LIN is at low level and the voltage of the VOUT (IGBT gate voltage) is below active Miller effect clamp NMOS input
threshold voltage, the active Miller effect clamp NMOS is being turned on and opens a low resistive path for the Miller current
through Cres.
VIN
VPG
VN1G
VOUT
P1 ON
N1 OFF
P1 OFF
N1 ON
Active Miller clamp NMOS
input threshold voltage
P1 ON
N1 OFF
VN2G
N2 OFF
N2 ON
N2 OFF
Tw
Active Miller effect clamp NMOS keeps turn-on if T_W does not exceed
active Miller clamp NMOS filter time
Publication Date : Jan 2012
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