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M37736MHL Datasheet, PDF (9/29 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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MITSUBISHI MICROCOMPUTERS
M37736MHLXXXHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
TIMING REQUIREMENTS (VCC = 2.7 – 5.5 V, VSS = 0 V, Ta = –40 to +85 °C, f(XIN) = 12 MHz, unless otherwise noted (Note 1))
Notes 1. This applies when the main clock division selection bit = “0” and f(f2) = 6 MHZ.
2. Input signal’s rise/fall time must be 100 ns or less, unless otherwise noted.
External clock input
Symbol
tc
tw(H)
tw(L)
tr
tf
Parameter
External clock input cycle time (Note 3)
External clock input high-level pulse width (Note 4)
External clock input low-level pulse width (Note 4)
External clock rise time
External clock fall time
Limits
Unit
Min.
Max.
83
ns
33
ns
33
ns
15
ns
15
ns
Notes 3. When the main clock division selection bit = “1”, the minimum value of tc = 166 ns.
4. When the main clock division selection bit = “1”, values of tw(H) / tc and tw(L) / tc must be set to values from 0.45 through 0.55.
Single-chip mode
Symbol
tsu(P0D–E)
tsu(P1D–E)
tsu(P2D–E)
tsu(P3D–E)
tsu(P4D–E)
tsu(P5D–E)
tsu(P6D–E)
tsu(P7D–E)
tsu(P8D–E)
tsu(P10D–E)
th(E–P0D)
th(E–P1D)
th(E–P2D)
th(E–P3D)
th(E–P4D)
th(E–P5D)
th(E–P6D)
th(E–P7D)
th(E–P8D)
th(E–P10D)
Port P0 input setup time
Port P1 input setup time
Port P2 input setup time
Port P3 input setup time
Port P4 input setup time
Port P5 input setup time
Port P6 input setup time
Port P7 input setup time
Port P8 input setup time
Port P10 input setup time
Port P0 input hold time
Port P1 input hold time
Port P2 input hold time
Port P3 input hold time
Port P4 input hold time
Port P5 input hold time
Port P6 input hold time
Port P7 input hold time
Port P8 input hold time
Port P10 input hold time
Parameter
Limits
Min.
Max.
Unit
200
ns
200
ns
200
ns
200
ns
200
ns
200
ns
200
ns
200
ns
200
ns
200
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
Memory expansion mode and microprocessor mode
Symbol
Parameter
tsu(D–E)
Data input setup time (external bus mode A)
tsu(D–RDE) Data input setup time (external bus mode B)
___
tsu(RDY– 1) RDY input setup time
____
tsu(HOLD– 1) HOLD input setup time
th(E–D)
Data input hold time (external bus mode A)
th(RDE–D)
th( 1–RDY)
th( 1–HOLD)
Data input hold time (external bus mode B)
___
RDY input hold time
____
HOLD input hold time
Limits
Min.
Max.
Unit
50
ns
50
ns
80
ns
80
ns
0
ns
0
ns
0
ns
0
ns
9