M35500AFP Datasheet, PDF (9/16 Pages) Mitsubishi Electric Semiconductor – FLD(VFD) CONTROLLER

MITSUBISHI <DIGITAL ASSP>
M35500AFP/BGP
RESET CIRCUIT
To reset the controller, the RESET pin should be held at a “L” level
for 2 µs or more. Then the RESET pin is returned to an “H” level (the
power source voltage should be between 4.0 V and 5.5 V, and XIN
oscillation is stable), reset is released.
Make sure that the reset input voltage is 0.5 V or less for 4.0 V of
VCC.
FLD(VFD) CONTROLLER
Poweron
RESET
VCC
0V
(Note)
0.2VCC
0V
Fig. 10. Reset circuit example
Note. Reset release voltage: VCC = 4.0 V
CLOCK GENERATING CIRCUIT
Oscillating circuit is built up by connecting pins XIN and XOUT as short
as possible and connecting a capacitor between pins XIN (XOUT) and
VSS.
When supplying a clock externally, input it to XIN pin and leave XOUT
pin open.
XIN
XOUT
XIN
XOUT
COSC
Fig. 11. RC generating circuit
External oscillation
circuit
VCC
VSS
Fig. 12. External clock input circuit
Open
HANDLING OF UNUSED PINS
Handle unused pins as the follow.
Table. 2. Handling of unused pins
Pin
Segment
Open
Digit
Open
Analog input
Connect to VCC or VSS through a resistor.
Handling
9