M30218 Datasheet, PDF (76/467 Pages) Mitsubishi Electric Semiconductor – M30218 Group

FLD controller
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Data setup
(1) 16-timing•Ordinary Mode
The area of addresses 057016 to 05DF16 are used as a FLD automatic display RAM.
When data is stored in the FLD automatic display RAM, the last data of FLD port P4 is stored at address 057016, the
last data of FLD port P3 is stored at address 058016, the last data of FLD port P2 is stored at address 059016, the last
data of FLD port P1 is stored at address 05A016, the last data of FLD port P0 is stored at address 05B016,
the last data of FLD port P5 is stored at address 05C016, and the last data of FLD port P6 is stored at address 05D016, to
assign in sequence from the last data respectively.
The first data of the FLD port P4, P3, P2, P1, P0, P5, and P6 is stored at an address which adds the value of (the
timing number – 1) to the corresponding address 057016, 058016, 059016, 05A016, 05B016, 05C016 and 05DF16.
Set the FLD data pointer reload register to the value given by the number of digits – 1.
(2) 16-timing•Gradation Display Mode
Display data setting is performed in the same way as that of the 16-timing•ordinary mode. Gradation display control
data is arranged at an address resulting from subtracting 007016 from the display data store address of each timing
and pin. Bright display is performed by setting “0”, and dark display is performed by setting “1” .
(3) 32-timing Mode
The area of addresses 050016 to 05DF16 are used as a FLD automatic display RAM.
When data is stored in the FLD automatic display RAM, the last data of FLD port P4 is stored at address 050016, the
last data of FLD port P3 is stored at address 052016, the last data of FLD port P2 is stored at address 054016,
the last data of FLD port P1 is stored at address 056016, the last data of FLD port P0 is stored at address 058016, the
last data of FLD port P5 is stored at address 05A016, and the last data of FLD port P6 is stored at address 05C016, to
assign in sequence from the last data respectively.
The first data of the FLD port P4, P3, P2, P0, P1, P5, and P6 is stored at an address which adds the value of (the
timing number – 1) to the corresponding address 050016, 052016, 054016, 056016, 058016, 05A016 and 05C016.
Set the FLD data pointer reload register to the value given by the number of digits - 1.
Number of timing: 8
(FLD data pointer reload register = 7)
Bit
Address
7
65
4
32
1
0
057016
057116
057216
057316
057416
057516
057616
057716
057816
057916
057A16
057B16
057C16
057D16
057E16
057F16
058016
058116
058216
058316
058416
058516
058616
058716
058816
058916
058A16
058B16
058C16
058D16
058E16
058F16
059016
059116
059216
059316
059416
059516
059616
059716
059816
059916
059A16
059B16
059C16
059D16
059E16
059F16
05A016
05A116
05A216
05A316
05A416
05A516
05A616
05A716
05A816
05A916
05AA16
05AB16
05AC16
05AD16
05AE16
05AF16
The last timing
(The last data of FLDP4)
Timing for start
(The first data of FLDP4)
FLDP4 data area
The last timing
(The last data of FLDP3)
Timing for start
(The first data of FLDP3)
FLDP3 data area
The last timing
(The last data of FLDP2)
Timing for start
(The first data of FLDP2)
FLDP2 data area
The last timing
(The last data of FLDP1)
Timing for start
(The first data of FLDP1)
FLDP1 data area
Bit
Address
7
6
5
43
2
10
05B016
05B116
05B216
05B316
05B416
05B516
05B616
05B716
05B816
05B916
05BA16
05BB16
05BC16
05BD16
05BE16
05BF16
05C016
05C116
05C216
05C316
05C416
05C516
05C616
05C716
05C816
05C916
05CA16
05CB16
05CC16
05CD16
05CE16
05CF16
05D016
05D116
05D216
05D316
05D416
05D516
05D616
05D716
05D816
05D916
05DA16
05DB16
05DC16
05DD16
05DE16
05DF16
The last timing
(The last data of FLDP0)
Timing for start
(The first data of FLDP0)
FLDP0 data area
The last timing
(The last data of FLDP5)
Timing for start
(The first data of FLDP5)
FLDP5 data area
The last timing
(The last data of FLDP6)
Timing for start
(The first data of FLDP6)
FLDP6 data area
Figure 45. Example of Using the FLD Automatic Display RAM in 16-timing•Ordinary Mode
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