M37735S4LHP Datasheet, PDF (7/36 Pages) Mitsubishi Electric Semiconductor – 16-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS
M37735S4LHP
16-BIT CMOS MICROCOMPUTER
Pulse output port mode
The pulse motor drive waveform can be output by using plural internal
timer A.
Figure 3 shows a block diagram for pulse output port mode. In the
pulse output port mode, two pairs of four-bit pulse output ports are
used. Whether using pulse output port or not can be selected by
waveform output selection bit (bit 0, bit 1) of waveform output mode
register (6216 address) shown in Figure 4. When bit 0 of waveform
output selection bit is set to “1”, RTP10, RTP11, RTP12, and RTP13
are used as pulse output ports, and when bit 1 of waveform output
selection bit is set to “1”, RTP00, RTP01, RTP02, and RTP03 are
used as pulse output ports. When bits 1 and 0 of waveform output
selection bit are set to“1”, RTP10, RTP11, RTP12, and RTP13, and
RTP00, RTP01, RTP02, and RTP03 are used as pulse output ports.
The ports not used as pulse output ports can be used as normal
parallel ports, timer input/output or key input interruput input.
In the pulse output port mode, set timers A0 and A2 to timer mode as
timers A0 and A2 are used. Figure 5 shows the bit configuration of
timer A0, A2 mode registers in pulse output port mode.
Data can be set in each bit of the pulse output data register
corresponding to four ports selected as pulse output ports. Figure 6
shows the bit configuration of the pulse output data register. The
contents of the pulse output data register 1 (low-order four bits of
1C16 address) corresponding to RTP10, RTP11, RTP12, and RTP13
is output to the ports each time the counter of timer A2 becomes
000016. The contents of the pulse output data register 0 (low-order
four bits of 1D16 address) corresponding to RTP00, RTP01, RTP02,
and RTP03 is output to the ports each time the counter of timer A0
becomes 000016.
Figure 7 shows example of waveforms in pulse output port mode.
When “0” is written to a specified bit of the pulse output data register,
“L” level is output to the corresponding pulse output port when the
counter of corresponding timer becomes 000016, and when “1” is
written, “H” level is output to the pulse output port.
Pulse width modulation can be applied to each pulse output port.
Since pulse width modulation involves the use of timers A1 and A3,
activate these timers in pulse width modulation mode.
Pulse width modulation selection bit
(Bit 4, 5 of 6216 address)
45
Pulse width modulation output
by timer A3
Pulse width modulation output
by timer A1
Timer A2
Pulse output data
register 1 (1C16 address)
D3
DTQ
D2
DQ
D1
DQ
D0
DQ
RTP13 (P57)
RTP12 (P56)
RTP11 (P55)
RTP10 (P54)
D11
DQ
D10
DQ
D9
DQ
D8
DTQ
Pulse output data
register 0 (1D16 address)
Timer A0
Fig. 3 Block diagram for pulse output port mode
RTP03 (P53)
RTP02 (P52)
RTP01 (P51)
RTP00 (P50)
Polarity selection bit
(Bit 3 of 6216 address)
7