M37271MF-XXXSP Datasheet, PDF (6/97 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M37271MF-XXXSP
M37271EF-XXXSP, M37271EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
PIN DESCRIPTION
Pin
VCC,
AVCC,
VSS.
CNVSS
_____
RESET
Name
Power source
CNVSS
Reset input
Input/
Output
Input
XIN
XOUT
Clock input
Clock output
P00/PWM4–
P02/PWM6,
P03,
P04/PWM0–
P07/PWM3
I/O port P0
PWM output
P10/OUT2, I/O port P1
P11/SCL1,
P12/SCL2,
P13/SDA1,
P14/SDA2,
OSD output
P15/I1,
P16/I2/INT3, Multi-master
P17/SIN
I²C-BUS interface
Serial I/O data
input
P20–P23
P24/AD3–
P26/AD1,
P27
I/O port P2
Analog input
P30, P31 I/O port P3
P40/AD4,
P41/INT2,
P42/TIM2,
P43/TIM3,
P44/INT1,
P45/SOUT,
P46/SCLK,
Input port P4
Analog input
External interrupt
input
External clock input
Serial I/O data
output
Serial I/O
synchronizing clock
input/output
P52/R,P53/G, Output port P5
P54/B,
P55/OUT1 OSD output
Input
Output
I/O
Output
I/O
Output
Output
Input
I/O
Input
I/O
Input
Input
Input
Input
Output
I/O
Output
Output
Name
Apply voltage of 5 V ± 10 % (typical) to VCC and AVCC, and 0 V to VSS.
This is connected to VSS.
To enter the reset state, the reset input pin must be kept at a “L” for 2 µs or more (under
normal VCC conditions).
If more time is needed for the quartz-crystal oscillator to stabilize, this “L” condition should
be maintained for the required time.
This chip has an internal clock generating circuit. To control generating frequency, an
external ceramic resonator or a quartz-crystal oscillator is connected between pins XIN and
XOUT. If an external clock is used, the clock source should be connected to the XIN pin and
the XOUT pin should be left open.
Port P0 is an 8-bit I/O port with direction register allowing each I/O bit to be individually
programmed as input or output. At reset, this port is set to input mode. The output structure
of P03 is CMOS output, that of P00–P02 and P04–P07 are N-channel open-drain output.
The note out of this Table gives a full of port P0 function.
Pins P00–P02 and P04–P07 are also used as PWM output pins PWM4–PWM6 and PWM0–
PWM3 respectively. The output structure is N-channel open-drain output.
Port P1 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure of P10 and P15–P17 is CMOS output, that of P11–P14 is N-channel open-drain
output.
Pins P10, P15, P16 are also used as OSD output pins OUT2, I1, I2 respectively. The output
structure is CMOS output.
Pins P11–P14 are used as SCL1, SCL2, SDA1 and SDA2 respectively, when multi-master
I²C-BUS interface is used. The output structure is N-channel open-drain output.
P17 pin is also used as serial I/O data input pin SIN.
Port P2 is an 8-bit I/O port and has basically the same functions as port P0. The output
structure is CMOS output.
Pins P24–P26 are also used as analog input pins AD3–AD1 respectively.
Ports P30 and P31 are a 2-bit I/O port and has basically the same functions as port P0. The
output structure is CMOS output.
Ports P40–P46 are a 7-bit input port.
P40 pin is also used as analog input pin AD4.
Pins P41, P44 are also used as external interrupt input INT2, INT1.
Pins P42 and P43 are also used as external clock input pins TIM2, TIM3 respectively.
P45 pin is used as serial I/O data output pin SOUT. The output structure is N-channel open-
drain output.
P46 pin is used as serial I/O synchronizing clock input/output pin SCLK. The output struc-
ture is N-channel open-drain output.
Ports P52–P55 are a 4-bit output port. The output structure is CMOS output.
Pins P52–P55 are also used as OSD output pins R, G, B, OUT1 respectively.
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