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M38507F8SP Datasheet, PDF (58/99 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER | |||
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MITSUBISHI MICROCOMPUTERS
3850 Group (Spec. H/A)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Status Register (SRD)
The status register shows the operating status of the flash
memory and whether erase operations and programs ended suc-
cessfully or in error. It can be read in the following ways:
(1) By reading an arbitrary address from the User ROM area after
writing the read status register command (7016)
(2) By reading an arbitrary address from the User ROM area in the
period from when the program starts or erase operation starts
to when the read array command (FF16) is input.
Also, the status register can be cleared by writing the clear status
register command (5016).
After reset, the status register is set to â8016â.
Table 13 shows the status register. Each bit in this register is ex-
plained below.
â¢Sequencer status (SR7)
The sequencer status indicates the operating status of the flash
memory. This bit is set to â0â (busy) during write or erase operation
and is set to â1â when these operations ends.
After power-on, the sequencer status is set to â1â (ready).
â¢Erase status (SR5)
The erase status indicates the operating status of erase operation.
If an erase error occurs, it is set to â1â. When the erase status is
cleared, it is set to â0â.
â¢Program status (SR4)
The program status indicates the operating status of write opera-
tion. When a write error occurs, it is set to â1â.
The program status is set to â0â when it is cleared.
If â1â is written for any of the SR5 and SR4 bits, the program,
erase all blocks, and block erase commands are not accepted.
Before executing these commands, execute the clear status regis-
ter command (5016) and clear the status register.
Also, if any commands are not correct, both SR5 and SR4 are set
to â1â.
Table 13 Definition of each bit in status register (SRD)
Symbol
Status name
SR7 (bit7)
SR6 (bit6)
SR5 (bit5)
SR4 (bit4)
SR3 (bit3)
SR2 (bit2)
SR1 (bit1)
SR0 (bit0)
Sequencer status
Reserved
Erase status
Program status
Reserved
Reserved
Reserved
Reserved
Definition
â1â
â0â
Ready
Busy
-
-
Terminated in error
Terminated normally
Terminated in error
Terminated normally
-
-
-
-
-
-
-
-
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