MH8S64DBKG-7 Datasheet, PDF (43/55 Pages) Mitsubishi Electric Semiconductor – 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM

Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S64DBKG -7,-7L,-8,-8L
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
Write Interrupted by Write / Read @BL=4
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
/CS
/RAS
/CAS
tRRD
tRCD
tCCD
/WE
CKE
DQM
A0-7
A10
A8,9,11
BA0,1
DQ
X
XY
YY
Y
Y
X
X
X
X
0
10
00
1
0
D0 D0 D0 D0 D0 D0 D1 D1
CL=3
Q0 Q0 Q0 Q0
ACT#0 WRITE#0 WRITE#0 WRITE#0
READ#0
ACT#1
WRITE#1
Burst Write can be interrupted by Write or Read of any active bank.
Italic parameter indicates minimum case
MIT-DS-0340-0.0
MITSUBISHI
ELECTRIC
( 43/ 55 )
17.Sep.1999