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M37905M4C Datasheet, PDF (40/102 Pages) Mitsubishi Electric Semiconductor – 16 BIT CMOS MICROCOMPUTER | |||
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MITSUBISHI MICROCOMPUTERS
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
16-BIT CMOS MICROCOMPUTER
When writing data to the dead-time timer (address A716), the data is
written to the reload register shared by three dead-time timers.
When the dead-time timers catch the start trigger from the respec-
tive timers, the reload register contents are transferred to its counter
and the dead-time timer decrements with the clock source selected
by bits 6 and 7 of three-phase output data register 0 (address A816).
Additionally, this timer can accept another trigger before completion
of the preceding trigger operation. In this case, after transferring the
reload register contents to the dead-time timer at acceptance of the
trigger, the value is decremented.
The dead-time timer operates as a one-shot pulse timer. Accordingly,
this timer starts pulse output when the trigger is caught, and finishes
pulse output and stops operation when its contents become â0016â,
and waits next trigger.
In the three-phase waveform mode, setting bit 7 of the waveform
output mode register (address A616) to â1â makes positive wave-
forms (U, V, W phases) and their negative waveforms (U, V, W
phases) output from the respective ports. When this bit is â0â, their
ports are floating. This bit is cleared to â0â by inputting a falling edge
to pin P6OUTCUT, by reset, or by executing instructions.
Additionally, setting bits 2 through 0 of the three-phase output data
register 0 (address A816) to â1â makes the corresponding waveform
outputs fixed. Whether the outputs are fixed to âHâ or âLâ is selected
by bits 2 through 0 of the three-phase output data register 1 (address
A916). Clearing these bits to â0â makes the corresponding waveform
outputs fixed to âHâ; setting these bits to â1â makes the outputs fixed
to âLâ.
76543210
Address
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Three-phase output data register 0 A816
W-phase output fix bit
0 : Released from output fixation
1 : Output fixed
V-phase output fix bit
0 : Released from output fixation
1 : Output fixed
U-phase output fix bit
0 : Released from output fixation
1 : Output fixed
When three-phase mode 0 is selected:
W-phase output polarity set buffer
0 : âHâ output
1 : âLâ output
When three-phase mode 1 is selected:
It may be either â0â or â1â.
In three-phase waveform mode, these bits
are invalid.
Any of them may be either â0â or â1â.
Clock-source-of-dead-time-timer select bits
0 0 : f2
0 1 : f4
1 0 : f8
1 1 : Do not select.
76543210
Address
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Three-phase output data register 1 A916
W-phase fixed outputâs polarity set bit
0 : âHâ output fixed
1 : âLâ output fixed
V-phase fixed outputâs polarity set bit
0 : âHâ output fixed
1 : âLâ output fixed
U-phase fixed outputâs polarity set bit
0 : âHâ output fixed
1 : âLâ output fixed
In three-phase waveform mode, this bit is invalid.
It may be either â0â or â1â.
When three-phase mode 0 is selected:
V-phase output polarity set buffer
0 : âHâ output
1 : âLâ output
When three-phase mode 1 is selected:
Interrupt request interval set bit
0 : Every second time
1 : Every fourth time
When three-phase mode 0 is selected:
U-phase output polarity set buffer
0 : âHâ output
1 : âLâ output
When three-phase mode 1 is selected:
Interrupt validity output select bit
0 : An interrupt request occurs at each
even-numbered underflow of timer A3.
1 : An interrupt request occurs at each
odd-numbered underflow of timer A3.
In three-phase waveform mode, these bits are invalid.
Any of them may be either â0â or â1â.
Fig. 44 Bit configuration of three-phase output data registers 1 and 0 in three-phase waveform mode
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