MH8S64QFC-7 Datasheet, PDF (34/55 Pages) Mitsubishi Electric Semiconductor – 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM

Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S64QFC -7,-7L,-8,-8L,-10,-10L
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
SWITCHING CHARACTERISTICS (SDRAM Component)
(Ta=0 ~ 70°C, Vdd = 3.3 ± 0.165V, Vss = 0V, unless otherwise noted)
Symbol Parameter
tAC Access time from CK
Limits
-7,-7L
-8,-8L
-10,-10L _Unit
Min. Max. Min. Max. Min. Max.
CL=2
6
7
8 ^ns
CL=3
6
tOH
tOLZ
tOHZ
Output Hold time
from CK
Delay time, output low
impedance from CK
Delay time, output high
impedance from CK
3
3
0
0
3 63
6
3
0
63
8 ns
ns
ns
8 ns
Note:3 If tr(clock rising time) is longer than 1ns,(tT/2-0.5)ns should be added to parameter.
Output Load
Condition
50Ω
VTT=1.4V
VOUT
50pF
CK
DQ
Output Timing
Measurement
Reference Point
1.4V
1.4V
CK
DQ
tAC
tOH
tOHZ
1.4V
1.4V
MIT-DS-0306-0.0
MITSUBISHI
ELECTRIC
( 34 / 55 )
12.Jan.1999