M2V64S20DTP Datasheet, PDF (31/51 Pages) Mitsubishi Electric Semiconductor – 64M Synchronous DRAM

MITSUBISHI LSIs
SDRAM (Rev.3.2)
Feb.'00
M2V64S20DTP-6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 4,194,304-WORD x 4-BIT)}
M2V64S30DTP-6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 2,097,152-WORD x 8-BIT)}
M2V64S40DTP-6,-6L,-7,-7L,-8,-8L ^{(4-BANK x 1,048,576-WORD x 16-BIT)}
64M Synchronous DRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Conditions
Ratings
Unit
Vdd
Supply Voltage
with respect to Vss
-0.5 ~ 4.6
V
VddQ Supply Voltage for Output with respect to VssQ
-0.5 ~ 4.6
V
VI
Input Voltage
with respect to Vss -0.5 ~ Vdd+0.5 V
VO
Output Voltage
with respect to VssQ -0.5 ~ VddQ+0.5 V
IO
Output Current
50
mA
Pd
Power Dissipation
Ta = 25'C
1000
mW
Topr Operating Temperature
0 ~ 70
'C
T stg
Storage Temperature
-65 ~ 150
'C
RECOM M ENDED OPERATING CONDITIONS
(Ta=0 ~ 70'C, unless otherwise noted)
Symbol
Parameter
Min.
Vdd
Supply Voltage
3.0
Vss
Supply Voltage
0
VddQ
Supply Voltage for Output
3.0
VssQ
Supply Voltage for Output
0
VIH *1 High-Level Input Voltage all inputs 2.0
VIL *2 Low-Level Input Voltage all inputs -0.3
NOTES)
1. VIH(max)=5.5V AC f or pulse width less than 10ns.
2. VIL(min)=-1.0V AC f or pulse width less than 10ns.
Limits
Unit
Typ.
Max.
3.3
3.6
V
0
0
V
3.3
3.6
V
0
0
V
Vdd+0.3
V
0.8
V
CAPACITANCE
(Ta=0 ~ 70'C, Vdd = VddQ = 3.3 ± 0.3V, Vs s = VssQ = 0V, unless otherwise noted)
Symbol
Parameter
CI(A) Input Capacitance, address pin
CI(C) Input Capacitance, control pin
CI(K) Input Capacitance, CLK pin
CI/O Input Capacitance, I/O pin
Limits
Test Condition
Unit
Min. Max.
2.5
VI=1.4v
2.5
f=1MHz
VI=200mVrms ^2.5
4.0
3.8
pF
3.8
pF
3.5
pF
6.5
pF
MITSUBISHI ELECTRIC
31