PS21965-4 Datasheet, PDF (3/10 Pages) Mitsubishi Electric Semiconductor – 600V/20A low-loss CSTBTTM inverter bridge for three phase DC-to-AC power conversion

MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21965-4/-4A/-4C/-4W
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 4 BOTH SIDES ZIGZAG TERMINAL TYPE PACKAGE OUTLINES (PS21965-4W)
0.28
1.778 ±0.25
38 ±0.5
20×1.778(=35.56)
35 ±0.3
A
16-0.5
B
3.5
1.5 ±0.05
17
1
2-R1.6
QR
Type name
Code _{Lot No.}
0.8
3 MIN
18
0.28
2.54 ±0.25
0.5
25
7-0.6
4-C1.2
14×2.54 (=35.56)
0.5
0.5
2.5 MIN
(2.656)
HEAT SINK SIDE
Dimensions in mm
TERMINAL CODE
1. NC
2. VUFB
3. VVFB
4. VWFB
5. UP
6. VP
7. WP
8. VP1
9. VNC *
10. UN
11. VN
12. WN
13. VN1
14. FO
15. CIN
16. VNC *
17. NC
18. NC
19. NC
20. N
21. W
22. V
23. U
24. P
25. NC
1.5 _MIN
(1.2)
(2.756)
HEAT SINK SIDE
DETAIL A
DETAIL B
*) Two VNC terminals (9 & 16 pin) are connected inside DIP-IPM, please connect either one to the 15V power supply GND outside and
leave another one open.
Fig. 5 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)
C1 : Electrolytic type with good temperature and frequency
characteristics
(Note : The capacitance value depends on the PWM control
scheme used in the applied system).
C2 : 0.22~2µF R-category ceramic capacitor for noise filtering.
AC line input
Inrush current
limiter circuit
P
(Note 4)
High-side input (PWM)
(3V, 5V line)(Note 1, 2)
Input signal Input signal Input signal
conditioning conditioning conditioning
Level shifter
Protection
circuit (UV)
Level shifter
Level shifter
Drive circuit Drive circuit Drive circuit
C2
C1
(Note 6)
(Note 5)
H-side IGBTS
DIP-IPM
U
V
W
(Note 7)
M
AC line output
ZC
Z : ZNR (Surge absorber)
C : AC filter (Ceramic capacitor 2.2~6.5nF)
(Note : Additionally, an appropriate line-to line
surge absorber circuit may become necessary
depending on the application environment).
N1
N
VNC
CIN
Drive circuit
L-side IGBTS
Input signal conditioning Fo logic
Protection
circuit
Control supply
Under-Voltage
protection
Note1:
2:
3:
4:
5:
6:
7:
Low-side input (PWM) FO
(3V, 5V line)(Note 1, 2) _{Fault output (5V line)}
(Note 3)
(Note 6)
VNC
VD
(15V line)
Input logic is high-active. There is a 3.3kΩ (min) pull-down resistor built-in each input circuit. When using an external CR filter, please make it satisfy the
input threshold voltage.
By virtue of integrating an application specific type HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer
isolation is possible. (see also Fig. 11)
This output is open drain type. The signal line should be pulled up to the positive side of the 5V power supply with approximately 10kΩ resistor.
(see also Fig. 11)
The wiring between the power DC link capacitor and the P, N1 terminals should be as short as possible to protect the DIP-IPM against catastrophic high
surge voltages. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to
these P & N1 DC power input pins.
High voltage (600V or more) and fast recovery type (less than 100ns) diodes should be used in the bootstrap circuit.
It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
Bootstrap negative electrodes should be connected to U, V, W terminals directly and separated from the main output wires.
Aug. 2007
3