M6MGB166S2BWG Datasheet, PDF (26/30 Pages) Mitsubishi Electric Semiconductor – 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 3.3V-ONLY FLASH MEMORY

MITSUBISHI LSIs
M6MGB/T166S2BWG
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM
Stacked-CSP (Chip Scale Package)
AC ELECTRICAL CHARACTERISTICS
(S-Vcc=2.7 ~ 3.6V, unless otherwise noted)
(1) TEST CONDITIONS
Supply voltage
Input pulse
Input rise time and fall time
2.7V~3.6V
VIH=2.2V, VIL=0.4V
5ns
Reference level
VOH=VOL=1.5V
Transition is measured +- 500mV from
steady state voltage.(for ten,tdis)
Output loads
Fig.1,CL=30pF
CL=5pF (for ten,tdis)
1TTL
DQ
CL
Including scope and
jig capacitance
Fig.1 Output load
(2) READ CYCLE
Symbol
Parameter
tCR
ta(A)
ta(CE1)
ta(CE2)
ta(LB)
ta(UB)
ta(OE)
tdis(CE1)
tdis(CE2)
tdis(LB)
tdis(UB)
tdis(OE)
ten(CE1)
ten(CE2)
tdis(LB)
tdis(UB)
ten(OE)
tV(A)
Read cycle time
Address access time
Chip enable 1 access time
Chip enable 2 access time
Lower Byte control access time
Upper Byte control access time
Output enable access time
Output disable time after S-CE1# high
Output disable time after S-CE2 low
Output disable time after S-LB# high
Output disable time after S-UB# high
Output disable time after S-OE high
Output enable time after S-CE1# low
Output enable time after S-CE2 high
Output enable time after S-LB# low
Output enable time after S-UB# low
Output enable time after S-OE low
Data valid time after address
Limits
SRAM
Min
Max
85
85
85
85
85
85
45
30
30
30
30
30
10
10
10
10
5
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(3) WRITE CYCLE
Symbol
Parameter
tCW
tw(W)
tsu(A)
tsu(A-WH)
tsu(LB)
tsu(UB)
tsu(CE1)
tsu(CE2)
tsu(D)
th(D)
trec(W)
tdis(W)
tdis(OE)
ten(W)
ten(OE)
Write cycle time
Write pulse width
Address setup time
Address setup time with respect to S-WE#
Lower Byte control setup time
Upper Byte control setup time
Chip enable 1 setup time
Chip enable 2 setup time
Data setup time
Data hold time
Write recovery time
Output disable time from S-WE# low
Output disable time from S-OE# high
Output enable time from S-WE# high
Output enable time from S-OE# low
Limits
SRAM
Min
Max
85
50
0
70
70
70
70
70
35
0
0
30
30
5
5
26
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Nov 1999 , Rev.2.3