M66335FP Datasheet, PDF (24/57 Pages) Mitsubishi Electric Semiconductor – FACSIMILE IMAGE DATA PROCESSOR

MITSUBISHI 〈DIGITAL ASSP〉
M66335FP
FACSIMILE IMAGE DATA PROCESSOR
The sequences of writing γ correction table to and reading it from
SRAM with a configuration of 64 words × 6 bits which is built in the
M66335 for γ correction are shown below.
Writing to the γ correction memory (MPU → M66335)
Initial setting (1) Memory address (0) Memory address (1)
CSB
A4 ~ A0
01H
0FH
0FH
~
WRB
D7 ~ D0
(Input)
D0=“1”
1
DATA (0)
2
Reading from the γ correction memory (M66335 → MPU)
DATA (1)
2
Initial setting (2) Memory address (0) Memory address (1)
CSB
A4 ~ A0
WRB
D7 ~ D0
(Input)
RDB
D7 ~ D0
(Output)
01H
D0=“1”
1
0FH
DATA (0)
3
0FH
~
DATA (1)
3
1 D0 (CNTRST) of the register 01 is set at “1” to reset the address counter of the γ correction memory.
2 GAMMA_D is selected in the register 0F, and DATA (0) of the MPU bus (D5 to D0) is written in the memory. The address counter of
the γ correction memory is incremented at the edge of the first transition of WRB. (For writing)
3 GAMMA_D is selected in the register 0F, and DATA (0) of the γ correction memory is read into the MPU bus (D5 to D0). The address counter
of the γ correction memory is incremented at the edge of the first transition of RDB. (For reading)
24