M37534M4 Datasheet, PDF (21/53 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS
7534 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Serial I/O
qSerial I/O1
• Asynchronous serial I/O (UART) mode
Serial I/O1 can be used as an asynchronous (UART) serial I/O. A
dedicated timer (baud rate generator) is also provided for baud rate
generation when serial I/O1 is in operation.
Eight serial data transfer formats can be selected, and the transfer
formats to be used by a transmitter and a receiver must be identi-
cal.
Each of the transmit and receive shift registers has a buffer register
(the same address on memory). Since the shift register cannot be
written to or read from directly, transmit data is written to the trans-
mit buffer, and receive data is read from the respective buffer regis-
ters. These buffer registers can also hold the next data to be trans-
mitted and receive 2-byte receive data in succession.
By selecting “1” for continuous transmit valid bit (bit 2 of SIO1CON),
continuous transmission of the same data is made possible.
This can be used as a simplified PWM.
Data bus
Address
(001816)
Serial I/O1 control register Address (001A16)
P10/RXD
XIN
P11/TXD
OE
Receive Buffer Register
Character length selection bit
ST Detector
7-bit
8-bit
Receive Shift Register
PE FE SP Detector
Receive buffer full flag (RBF)
Receive interrupt request (RI)
1/16
Clock Control Circuit
UART Control Register
Address (001B16)
BRG count source selection bit
1/4
Division ratio 1/(n+1)
Baud Rate Generator
Address (001C16)
ST/SP/PA Generator
1/16
Transmit Shift Register
Character length selection bit
Transmit shift register shift
completion flag (TSC)
Transmit interrupt source selection bit
Transmit interrupt request (TI)
Continuous transmit valid bit
Transmit Buffer Register
Data bus
Address
(001816)
Transmit buffer empty flag (TBE)
Serial I/O1 status register Address (001916)
Fig. 22 Block diagram of UART serial I/O
Transmit/Receive Clock
Transmit Buffer Register
Write Signal
TBE=0
TSC=0
TBE=1
Serial Output TXD
ST
Receive Buffer Register
Read Signal
TBE=0
D0
D1
1 Start Bit
7 or 8 Data Bit
1 or 0 Parity Bit
1 or 2 Stop Bit
Serial Input RXD
ST
D0
D1
TBE=1
SP
ST
D0
TSC=1*
D1
SP
* Generated at second bit in 2-stop -bit
mode
RBF=1
SP
ST
RBF=0
D0
D1
RBF=1
SP
Notes 1 : Error flag detection occurs at the same time that the RBF flag becomes “1” (at 1st stop bit, during reception).
2 : The transmit interrupt (TI) can be selected to occur when either the TBE or TSC flag becomes “1”, depending on the setting of the transmit
interrupt source selection bit (TIC) of the serial I/O1 control register.
3 : The receive interrupt (RI) is set when the RBF flag becomes “1”.
4 : After data is written to the transmit buffer when TSC = 1, 0.5 to 1.5 cycles of the data shift cycle is necessary until changing to TSC = 0.
Fig. 23 Operation of UART serial I/O function
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