M5M5W816WG-85L Datasheet, PDF (2/8 Pages) Mitsubishi Electric Semiconductor – 8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM

1999.1.15 Ver. 0.1
MITSUBISHI LSIs
M5M5W816WG -85L, 10L, 85H, 10H
-85LI, 10LI, 85HI, 10HI
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM
FUNCTION
The M5M5W816WG is organized as 524288-words by 16-
bit. These devices operate on a single +1.8~2.7V power
supply, and are directly TTL compatible to both input and
output. Its fully static circuit needs no clocks and no refresh,
and makes it useful.
The operation mode are determined by a combination of
the device control inputs BC1 , BC2 , S1, S2 , W and OE.
Each mode is summarized in the function table.
A write operation is executed whenever the low level W
overlaps with the low level BC1 and/or BC2 and the low level
S1 and the high level S2. The address(A0~A18) must be set
up before the write cycle and must be stable during the entire
cycle.
A read operation is executed by setting W at a high level
and OE at a low level while BC1 and/or BC2 and S1 and S2
are in an active state(S1=L,S2=H).
When setting BC1 at the high level and other pins are in an
active stage , upper-byte are in a selectable mode in which
both reading and writing are enabled, and lower-byte are in a
non-selectable mode. And when setting BC2 at a high level
and other pins are in an active stage, lower-byte are in a
selectable mode and upper-byte are in a non-selectable
mode.
BLOCK DIAGRAM
When setting BC1 and BC2 at a high level or S1 at a high level
or S2 at a low level, the chips are in a non-selectable mode in
which both reading and writing are disabled. In this mode, the
output stage is in a high-impedance state, allowing OR-tie with
other chips and memory expansion by BC1, BC2 and S1, S2.
The power supply current is reduced as low as 0.1µA(25°C,
typical), and the memory data can be held at +1V power supply,
enabling battery back-up operation during power failure or
power-down operation in the non-selected mode.
FUNCTION TABLE
S1 S2 BC1 BC2 W OE Mode ^{DQ1~8 DQ9~16} Icc
H L X X X X Non selection High-Z High-Z Standby
L L X X X X ^{Non selection} High-Z High-Z Standby
H H X X X X ^{Non selection} High-Z High-Z Standby
X X H H X X Non selection High-Z High-Z Standby
L H L H L X Write Din High-Z Active
L H L H H L Read Dout High-Z Active
LH L HH H
High-Z High-Z Active
L H H L L X Write High-Z Din Active
L H H L H L Read High-Z Dout Active
LH H L HH
High-Z High-Z Active
L H L L L X Write Din Din Active
L H L L H L Read Dout Dout Active
LH L LHH
High-Z High-Z Active
A0
DQ
1
A1
MEMORY ARRAY
DQ
524288 WORDS
8
x 16 BITS
A17
-
DQ
9
A18
S1
CLOCK
GENERATOR
DQ
16
S2
BC1
BC2
Vcc
W
GND
OE
MITSUBISHI ELECTRIC
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