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M37510M6 Datasheet, PDF (18/43 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7510 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SERIAL I/O
The 7510 group has two built-in serial I/O channels (serial I/O1
and serial I/O2). Both serial I/O ports are functionally identical.
Serial I/O can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer (baud rate generator) is
also provided for baud rate generation.
Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode can be selected by setting the
mode selection bit of the serial I/O control register (addresses
001A16 and 003216) to “1”.
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB (addresses 001816 and
003016).
Data bus
P44/RXD1
P30/RXD2
Address 001816 003016 Serial I/O control register Address 001A16 003216
Receive buffer
Receive buffer full flag (RBF)
Receive shift register
Shift clock
Receive interrupt request (RI)
Clock control circuit
P46/SCLK1
P32/SCLK2
f(XIN)
BRG count source selection bit
1/4
Serial I/O
synchronous clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator 1/4
Address 001C16 003416
P47/SRDY1
P33/SRDY2
P45/TXD1
P31/TXD2
F/F
Falling-edge detector
Clock control circuit
Shift clock
Transmit shift completion flag (TSC)
Transmit shift register
Transmit interrupt source selection bit
Transmit interrupt request (TI)
Transmit buffer register
Address 001816
003016
Data bus
Transmit buffer empty flag (TBE)
Serial I/O status register Address 001916 003116
Contents in are for serial I/O2.
Fig. 13 Block diagram of clock synchronous serial I/O
Internal clock φ
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output TXD
Serial input RXD
Receive enable signal SRDY
Write signal to
receive/transmit buffer
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
TBE = 0 TBE = 1
TSC = 0
RBF = 1
TSC = 1
Overrun error (OE) detection
Notes 1 : The transmit interrupt (TI) can be selected to occur either when the transmit buffer has emptied (TBE = 1) or after the transmit shift
operation has ended (TSC = 1), by setting the transmit interrupt source selection bit (TIC) of the serial I/O control register.
2 : If data is written to the transmit buffer when TSC = 0, the transmit clock is generated continuously and serial data is output continuously
from the TXD pin.
3 : The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1”.
Fig. 14 Operation of clock synchronous serial I/O function
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