M65762FP Datasheet, PDF (13/28 Pages) Mitsubishi Electric Semiconductor – QM-CODER(purpose of reducing)

(13) Scale-up/scale-down set register (W/R)
d7
d4
(Address: D) CONV_REG:
0
HO HR VR
d0
HE VE
d0 (VE)
d1 (HE)
:Selection of scale-up in vertical direction during
decoding (0: Equal size, Scale-up by twice)
:Selection of scale-up in horizontal direction during
decoding (0: Equal size, Scale-up by twice)
Scale-up function is effective only in decoding
(Scale-up enabled)
d2 (VR)
d3 (HR)
d4 (HO)
:Selection of scale-down in vertical direction (0: Equal
size, Scale-down by 1/2)
:Selection of scale-down in horizontal direction (0:
Equal size, Scale-down by 1/2)
:Selection of thinned-out processing in horizontal
direction (0: Simple thinned-out, 1: OR processing)
Scale-down function is effective only in encoding
(Scale-down enabled)
(Note1) During coding, simple thinned-out is applied
to 1/2 scale-down in vertical direction (Odd
lines are skipped in reading.)
(Note2) With VR = 1 during coding, the number of
lines on input image data must be larger by
twice than the set value of line count setup
register.
(Note3) With VE = 1 during decoding, the number of
lines on output image data must be larger by
twice than the set value of line count setup
register.
3. Register Initial Value
Registers are initialized as provided in the following table by
writing H/W reset into the external reset pin or system setup
register.
Table 6. Initial Values of Registers
Register
Initial value
Register
Initial value
System setting
Parameter setting
Command
Status
Interrupt enable
Pixel setting
Line count setting
0 0 h (Note) Number of processed lines
00h
Buffer register
00h
Operation mode setting
00h
Marker code setting
00h
Marker code reading
00h
Scale-up/scale-down setting
00h
00h
Indefinite
00h
00h
00h
00h
(Note) When H/W reset is written into the system setting register,
written value is set in the system setting register.
MITSUBISHI SEMICONDUCTOR (LSI)
M65762FP
QM-CODER