M52743SP Datasheet, PDF (10/19 Pages) Mitsubishi Electric Semiconductor – I 2 C BUS CONTROLLED 3-CHANNEL VIDEO PREAMPLIFIER

MITSUBISHI ICs (Monitor)
M52743SP/M52744SP
I²C BUS CONTROLLED 3-CHANNEL VIDEO PREAMPLIFIER
TDS-F Sync output delay time1
SyncOUT becomes High with sync part of SG4.
Measure the time needed for the front edge of SG4 sync to fall from
50% and for SyncOUT to rise from 50% with an active prove. The
measured value is treated as TDS-F, less than 90nsec.
TDS-R Sync output delay time2
Measure the time needed for the rear edge of SG4 sync to rise from
50% and for SyncOUT to fall from 50% with an active prove. The
measured value is treated as TDS-R, less than 90nsec.
SG4
SyncOUT
sync (50%)
TDS-F
Pedestal voltage
(50%)
TDS-R
VOH D/A H output voltage
Measure the DC voltage at D/AOUT. The measured value is
ttreated as VOH.
VOL D/A L output voltage
Measure the DC voltage at D/AOUT. The measured value is
ttreated as VOL.
IAO D/A output current range
Electric current flow from the output of D/AOUT must be less than
1.0mA.
Electric current flow in the output of D/AOUT must be less than
0.4mA.
DNL D/A nonlinearity
The difference of differential non-linearity of D/AOUT must be less
than ±1.0LSB.
BUS CONTROL TABLE
(1) Slave address
D7 D6 D5 D4 D3 D2 D1 R/W
1
0
0
0
1
0
0
0
=88H
(2) Each function’s sub address
Function
Main contrast
Sub contrast R
Sub contrast G
Sub contrast B
OSD level
RE-BLK adjust
D/A OUT1
D/A OUT2
D/A OUT3
D/A OUT4
Pedestal clamp INT/EXT SW
Notes) pedestal level INT/EXT SW
0→INT 1→EXT
bit
sub
add.
D7
Data byte (up:bit information down: preset)
D6
D5
D4
D3
D2
D1
D0
A07 A06 A05 A04 A03 A02 A01 A00
8
00H
0
1
0
0
0
0
0
0
A17 A16 A15 A14 A13 A12 A11 A10
8
01H
1
0
0
0
0
0
0
0
A27 A26 A25 A24 A23 A22 A21 A20
8
02H
1
0
0
0
0
0
0
0
A37 A36 A35 A34 A33 A32 A31 A30
8
03H
1
0
0
0
0
0
0
0
−
−
−
−
A43 A42 A41 A40
4
04H
0
0
0
0
1
0
0
0
−
−
−
−
A53 A52 A51 A50
4
05H
0
0
0
0
1
0
0
0
A67 A66 A65 A64 A63 A62 A61 A60
8
06H
1
0
0
0
0
0
0
0
A77 A76 A75 A74 A73 A72 A71 A70
8
07H
1
0
0
0
0
0
0
0
A87 A86 A85 A84 A83 A82 A81 A80
8
08H
1
0
0
0
0
0
0
0
A97 A96 A95 A94 A93 A92 A91 A90
8
09H
1
0
0
0
0
0
0
0
−
−
−
−
−
−
−
AB0
1
0BH
0
0
0
0
0
0
0
0
10