MH8S72BALD-6 Datasheet, PDF (1/40 Pages) Mitsubishi Electric Semiconductor – 603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM

MITSUBISHI LSIs
MH8S72BALD-6
603,979,776-BIT ( 8,388,608-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
PRELIMINARY
Some of contents are subject to change without notice.
DESCRIPTION
The MH8S72BALD is 8388608 - word x 72-bit Synchronous
DRAM module. This consist of nine industry standard 8M x
8 Synchronous DRAMs in TSOP.
The TSOP on a card edge dual in-line package provides any
application where high densities and large of quantities
memory are required.
This is a socket-type memory module ,suitable for easy
interchange or addition of module.
FEATURES
Type name
Max.
Frequency
Access Time from CLK
[component level]
MH8S72BALD-6
133MHz
5.4ns
(CL = 3)
85pin
94pin
95pin
1pin
10pin
11pin
Utilizes industry standard 8M X 8 Synchronous DRAMs in TSOP
package
Single 3.3V +/- 0.3V supply
Max.Clock frequency 133MHz
Fully synchronous operation referenced to clock rising edge
4-bank operation controlled by BA0,BA1(Bank Address)
/CAS latency -2/3(programmable,at buffer mode)
LVTTL Interface
Burst length 1/2/4/8/Full Page(programmable)
Burst type- Sequential and interleave burst (programmable)
Random column access
Burst Write / Single Write(programmable)
Auto precharge / All bank precharge controlled by A10
Auto refresh and Self refresh
4096 refresh cycles every 64ms
124pin 40pin
125pin 41pin
APPLICATION
Main memory or graphic memory in computer systems
168pin 84pin
MIT-DS-0316-0.0
MITSUBISHI
ELECTRIC
11/May. /1999 ₁