MH64S72QJA-7 Datasheet, PDF (1/56 Pages) Mitsubishi Electric Semiconductor – 4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM

MITSUBISHI LSIs
MH64S72QJA -7,-8
4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
PRELIMINARY
Some of contents are subject to change w ithout notice.
DESCRIPTION
The MH64S72QJA is 67108864 - word x 72-bit
Sy nchronous DRAM stacked structural module. This
consist of thirty -six industry standard 32M x 4
Sy nchronous DRAMs in TSOP.
The stacked structure of TSOP on a card edge dual in-
line package prov ides any application where high
densities and large of quantities memory are required.
This is a socket-ty pe memory m odule ,suitable f or
easy interchange or addition of module.
85pin 1pin
FEATURES
Type name
MH64S72QJA-7
MH64S72QJA-8
Max.
Frequency
100MHz
100MHz
CLK
Access Time
[latch mode]
(CL = 4)
6ns
6ns
CLK
Access Time
[buffer mode]
(CL = 3)
6ns
6ns
94pin
95pin
10pin
11pin
Utilizes industry standard 32M X 4 Synchronous DRAMs in
TSOP package , industry standard Resister in TSSOP package ,
and industrystandard PLL in TSSOP package.
Single 3.3V +/- 0.3V power supply
LVTTL Interface
4096 refresh cycles every64ms
124pin 40pin
125pin 41pin
APPLICATION
Main memoryunit for computers, Microcomputer memory.
168pin 84pin
MIT-DS-0332-0.0
MITSUBISHI
ELECTRIC
16/Jun./1999
1