MH4S64CBMD-10 Datasheet, PDF (1/47 Pages) Mitsubishi Electric Semiconductor – 268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM

Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH4S64CBMD-10,-12,-15,-10B,-12B,-15B
268435456-BIT (4194304-WORD BY 64-BIT)SynchronousDRAM
DESCRIPTION
The MH4S64CBMD is 4194304-word by 64-bit
Synchronous DRAM module. This consists of sixteen
industry standard 2Mx8 Synchronous DRAMs in
TSOP and one industory standard EEPROM in
TSSOP.
The mounting of TSOP on a card edge Dual Inline
package provides any application where high
densities and large quantities of memory are
required.
This is a socket type - memory modules, suitable for
easy interchange or addition of modules.
FEATURES
Frequency
-10,-10B 100MHz
CLK Access Time
(Component SDRAM)
8ns(CL=3)
-12,-12B ^83MHz
8ns(CL=3)
-15,-15B 67MHz
9ns(CL=3)
Utilizes industry standard 2M x 8 Synchronous DRAMs
TSOP and industry standard EEPROM in TSSOP
168-pin (84-pin dual in-line package)
single 3.3V±0.3V power supply
Clock frequency 100MHz/83MHz/67MHz
Fully synchronous operation referenced to clock rising
edge
Dual bank operation controlled by BA(Bank Address)
/CAS latency- 1/2/3(programmable)
Burst length- 1/2/4/8(programmable)
Burst type- sequential / interleave(programmable)
Column access - random
Auto precharge / All bank precharge controlled by A10
Auto refresh and Self refresh
4096 refresh cycle /64ms
LVTTL Interface
85pin 1pin
94pin
95pin
10pin
11pin
124pin 40pin
125pin 41pin
168pin 84pin
APPLICATION
main memory or graphic memory in computer systems
MIT-DS-0113-1.1
MITSUBISHI
ELECTRIC
( 1 / 47 )
25.Mar..1997