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M66255FP Datasheet, PDF (1/11 Pages) Mitsubishi Electric Semiconductor – 8192 x 10-BIT LINE MEMORY (FIFO) | |||
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MITMSITUSBUISBHISI Hâ©DI Iâ©GDIITGAITLAALSASSPS⪠Pâª
M662M56652F55PFP
DESCRIPTION
The M66255FP is a high-speed line memory with a FIFO
(First In First Out) structure of 8192-word à 10-bit configura-
tion which uses high-performance silicon gate CMOS pro-
cess technology.
It has separate clock, enable and reset signals for write and
read, and is most suitable as a buffer memory between de-
vices with different data processing throughput.
FEATURES
⢠Memory configuration of 8192 words à 10 bits (dynamic
memory)
⢠High-speed cycle ............................................. 30ns (Min.)
⢠High-speed access ......................................... 25ns (Max.)
⢠Output hold ........................................................ 5ns (Min.)
⢠Fully independent, asynchronous write and read operations
⢠Variable length delay bit
⢠Output .................................................................... 3 states
APPLICATION
Digital photocopiers, high-speed facsimile, laser beam print-
ers.
8192 Ã 10-BIT LINE MEMORY (FIFO)
8192 Ã 10-BIT LINE MEMORY (FIFO)
PIN CONFIGURATION (TOP VIEW)
Q0 â 1
Q1 â 2
DATA OUTPUT Q2 â 3
Q3 â 4
Q4 â 5
READ ENABLE INPUT RE â 6
READ RESET INPUT RRES â 7
GND 8
READ CLOCK INPUT RCK â 9
Q5 â 10
Q6 â 11
DATA OUTPUT Q7 â 12
Q8 â 13
Q9 â 14
28 â D0
27 â D1
26 â D2 DATA INPUT
25 â D3
24 â D4
23 â WE WRITE ENABLE INPUT
22 â WRES WRITE RESET INPUT
21 VCC
20 â WCK WRITE CLOCK INPUT
19 â D5
18 â D6
17 â D7 DATA INPUT
16 â D8
15 â D9
Outline 28P2W-C
BLOCK DIAGRAM
WRITE
ENABLE INPUT WE 23
WRITE
RESET INPUT WRES 22
WRITE
CLOCK INPUT WCK 20
VCC 21
DATA INPUT
D0 ~ D9
15 16 17 18 19 24 25 26 27 28
INPUT BUFFER
DATA OUTPUT
Q0 ~ Q9
1 2 3 4 5 10 11 12 13 14
OUTPUT BUFFER
MEMORY ARRAY OF
8192-WORD Ã 10-BIT
CONFIGURATION
6 RE
READ
ENABLE INPUT
READ
7 RRES RESET INPUT
READ
9 RCK CLOCK INPUT
8 GND
1
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