M65664FP Datasheet, PDF (1/14 Pages) Mitsubishi Electric Semiconductor – PICTURE-IN-PICTURE SIGNAL PROCESSING

MITSUBISHI DIGITAL TV ICs
M65664FP
PICTURE-IN-PICTURE
SIGNAL PROCESSING
DESCRIPTION
APPLICATION
The M65664FP is a PIP (Picture in Picture) signal
NTSC, PAL-M, PAL-N color TV
processing LSI, whose sub-picture input is composite
signal for NTSC, PAL-M, and PAL-N. The built-in field
memory (168k-bit RAM) , V-chip data slicer and analog
circuitries lead the high quality PIP system low cost and
small size.
FEATURES
RECOMMENDED OPERATING CONDITIONS
Supply voltage range ------------------------ 3.2 ~ 3.5 V
Operating frequency ----------------------- 14.32 MHz
Operating temperature ------------------------ 0 ~ 70 deg.
Input voltage (CMOS interface) "H" ----- VDD x 0.7 ~ VDD V
"L" ----- 0 ~ VDD x 0.3 V
Output current ( output buffer ) ------------ 4 mA ( MAX )
Output load capacitance ---------------------- 20 pF ( MAX ) *1
Circuit current ----------------------------------- - mA
* Internal V-chip data slicer (for sub-picture)
* Vertical filter for sub-picture ( Y signal )
* Single sub-picture ( selectable picture size : 1/9 , 1/16 )
* Sub-picture processing specification ( 1/9 , 1/16 size) :
Quantization bits Y, B-Y, R-Y : 7 bits
Horizontal sampling 229 pixels (Y), 57 pixels (B-Y, R-Y)
NOTICE: Connect a 0.1µF or larger capacitor between VDD and VSS pins.
*1 : Include pin capacitance ( 7 pF )
Vertical lines
69/ 52 lines
* Frame ( sub-picture ) on/off
* Built-in analog circuits :
One 8-bit A/D converter (for sub-picture signal)
Three 8-bit D/A converters (for Y, U and V of sub-picture)
Sync-tip-clamp, VCXO ... etc..
* IIC BUS control ( parallel/serial control) :
PIP on/off , Frame on/off ( programmable luma level),
Sub-picture size ( 1/9, 1/16 ),
PIP position ( free position ), Picture freeze ,
Y delay adjustment, Chroma level, Tint, Black level,
Contrast ...etc..
PIN CONFIGURATION (TOP VIEW)
SWM 1
ACK 2
SDATA ³
SCLK ⁴
DVdd ⁵
DVss ⁶
BGPS ⁷
SCK ⁸
BGPM ⁹
FSC ¹⁰
TEST5 ¹¹
TEST6 ¹²
SWMG ¹³
RESET 14
DVdd 15
DVss 16
MCK 17
CSYNCS ¹⁸
AVss(ad) ¹⁹
Vrb ²⁰
Vrt ²¹
42 AVss(ana)
41 ADJ_Usub
40 Vdd(da)
39 YOUT
38 ADJ_Ysub
37 UOUT
36 ADJ_Vsub
35 _VOUT
34 TESTEN
33 _VD
32 _HD
31 _AVss(vcxo)
30 _X'tal(P-N)
29 _X'tal(P-M)
28 _X'tal(NT)
27 BIAS
26 _Filter
25 _AVdd(vcxo)
24 _AVdd(ad)
23 _{Vin(Sync sepa.)}
22 _Vin(ad)
Outline 0.8mm pitch 42 Pin SOP Package
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