M62500P Datasheet, PDF (1/11 Pages) Mitsubishi Electric Semiconductor – SYNCHRONIZATION DEFLECTION SYSTEM CONTROL PWM IC

MITSUBISHI (Dig./Ana. INTERFACE)
M62500P/FP
SYNCHRONIZATION DEFLECTION SYSTEM CONTROL PWM IC
DESCRIPTION
The M62500 is a semiconductor integrated circuit designed and
developed as a deflection control of the CRT display monitor.
The built-in trigger mode oscillator allows stable PWM control to be
gained against a wide range of change of external signals.
The M62500 provides a low supply voltage output malfunction
preventive circuit (UVLO) and software start function optimum to
horizontal output correction of monitor, high voltage drive and high
voltage regulator.
FEATURES
PWM output in synchronization with external signals
Wide range of PWM control frequency
15kHz to 150kHz
The PWM output phase is adjustable against external signals
Soft start
Built-in low voltage output malfunction prevention circuit
Start VCC>9V
Stop VCC<6V
APPLICATION
CRT display monitor
PIN CONFIGURATION (TOP VIEW)
GND 1
VREF 2
Tin 3
Delay Adj 4
CAGC1 5
DTC 6
IN1 (+) 7
IN1 (-) 8
FB1 9
COLLECTOR1 10
OUT1 11
P.GND 12
24 VCC
23 DRIVE OUTPUT
22 Phase Adj
21 Duty Adj
20
DOUBLE SPEED
SWITCH
19 RAGC
18 CAGC2
17 IN2 (+)
16 IN2 (-)
15 FB2
14 COLLECTOR2
13 OUT2
Outline 24P4D (P)
24P2V-A (FP)
BLOCK DIAGRAM
DRIVE Phase
VCC OUTPUT Adj
24
23
22
Duty
Adj
21
DOUBLE
SPEED
SWITCH
20
RAGC
19
CAGC2
18
IN2 (+)
17
IN2 (-)
16
FB2 COLLECTOR2 OUT2
15
14
13
WIND
COMP
PHASE
CONT
DUTY
CONT
EDGE
DETECTION
(SWITCH)
GEN
AGC
VREF
comp
GEN
DELAY
AGC
OUTPUT START
START (VCC>9V)
STOP (VCC<6V)
VCC
1
GND
2
VREF
3
4
5
6
7
8
9
10
11
12
Tin
Delay CAGC1 DTC IN1 (+) IN1 (-) FB1 COLLECTOR1 OUT1 P. GND
Adj
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