M62009L Datasheet, PDF (1/3 Pages) Mitsubishi Electric Semiconductor – LOW POWER 2 OUTPUT SYSTEM RESET IC WITH EXTERNAL INPUT

MITSUBISHI<Dig.Ana.INTERFACE>
M62009L,P,FP
LOW POWER 2 OUTPUT SYSTEM RESET IC WITH EXTERNAL INPUT
DESCRIPTION
As applications for microcomputers are increasing,a desire has
arisen for a RAM backup function.Let us introduce Mitsubishi
Electric new low power dissipation,high-performance system
reset IC,which is suitable for such RAM backup.
The M62009,which is a low power-dissipation 2-output
microcomputer system reset IC,is a 2-output system reset IC
which provides for RAM backup in microcomputers,and
reduces power dissipation by using the Bi-CMOS process.The
M62009 considerably reduces the number of components in
the reset circuit.
The M62009 performs two-stage detection of normal supply
voltage and backup supply voltage required for backup
mode.When the supply voltage is switched from normal supply
voltage to back up supply voltage the interruption output,which
is one of the two outputs,gives the interruption signal to a
microcomputer,in this way,the microcomputer reduces power
dissipation and enters in the backup mode. If the backup
supply voltage goes lower than the voltage required for
backup,the reset output(RESET output)which is different from
the INT output gives the reset signal (forced reset) to the
microcomputer.The interruption signal from the INT output
recovers the microcomputer from the backup mode. To
recover from reset, RESET output is canceled when the
specified interval of time (delay time) elapses after the signal is
given from the INT output.
FEATURES
•Bi-CMOS process low power dissipation circuit configuration
Icc=7µA(Typ.) (Normal mode Vcc1=Vcc2=5.0V)
Icc=5µA(Typ.) (Backup mode Vcc1=5.0V)
Icc=1µA(Typ.) (Backup mode Vcc1=2.5V)
•Two supply detection
Vcc1(RESET) Vcc1-1=4.0V(typ):Increase of Vcc1
Vs1-2=2.0V(typ):Decrease of Vcc1
Vcc2(INT) Free set up
•Two outputs(open drain type)
Reset output (RESET):Forced reset signal output
Interruption output(INT):Output of the signal for interruption
processing
(output of the switching signal for
backup mode)
BLOCK DIAGRAM
PIN CONFIGURATION (TOP VIEW)
8 _NC
7 _Vcc1
6 _Cd
5 _RESET
4 GND
3 _INT
2 _Vcc2
1 _VI
Outline 8P5(L)
VI 1
8 NC
Vcc2 2
INT ³
GND 4
7 _Vcc1
6 _Cd
5 _RESET
Outline 8P4(P)
8P2S-A(FP)
NC:NO CONNECTION
•Packages 2 types
5-pin SIP (single in-line)
8-pin SOP (mini flat)
APPLICATION
Prevention of errors in microcomputer system in electronic
equipment that requires RAM backup,such as
office,industrial,and home-use equipment.
Vcc1
7
Vs1-1 4.0V(TYP)DETECTION
Vs1-2 2.0V(TYP)DETECTION
BIAS CIRCUIT
Vcc2 2
VI ₁
+
DELAY CIRCUIT
-
-
+
Vs2
1.25V(TYP)
4
GND
5 RESET
6 Cd
3 INT
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