M5M54R04J-12 Datasheet, PDF (1/6 Pages) Mitsubishi Electric Semiconductor – 4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM

MITSUBISHI LSIs
M5M54R04J-12,-15
1997.11.20 Rev.F
4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM
DESCRIPTION
The M5M54R04J is a family of 1048576-word by 4-bit static _{PIN CONFIGURATION (TOP VIEW)}
RAMs, fabricated with the high performance CMOS silicon gate
process and designed for high speed application.
The M5M54R04J is offered in a 32-pin plastic small outline J-
lead package(SOJ).
These device operate on a single 5V supply, and are directly
TTL compatible. They include a power down feature as well.
FEATURES
• Fast access time M5M54R04J-12 •••• 12ns(max)
M5M54R04J-15 •••• 15ns(max)
• Low power dissipation Active •••••••••• 450mW(typ)
Stand by •••••••••• 5mW(typ)
• Single +5V power supply
• Fully static operation : No clocks, No refresh
• Common data I/O
• Easy memory expansion by S
• Three-state outputs : OR-tie capability
• OE prevents data contention in the I/O bus
• Directly TTL compatible : All inputs and outputs
A0 1
address
inputs
A1 ²
A2 3
A3 4
chip select
input
A4 5
S6
data inputs/
outputs _(5V)
DQ1
VCC
7
8
(0V) _{GND 9}
data inputs/
outputs
DQ2 ¹⁰
write control W 11
input
A5 ¹²
address
inputs
A6 13
A7 14
A8 15
A9 ¹⁶
Outline
32 A19
31 _A18
30 A17
29 A16
address
inputs
28 A15
27 _OE
output enable
input
26 DQ4 data inputs/
25 GND (0V) ^outputs
24 _VCC (5V)
23 DQ3
22 _A14
data inputs/
outputs
21 A13
20 A12
19 A11
address
inputs
18 A10
17 NC
32P0K(SOJ)
APPLICATION
High-speed memory units
BLOCK DIAGRAM
address
inputs
A0 ₁
A1 2
A2 ₃
A3 ₄
A4 5
A5 ₁₂
A6 ₁₃
A7 ₁₄
A8 ₁₅
S6
W ₁₁
OE 27
PACKAGE
32pin 400mil SOJ
MEMORY ARRAY
512 ROWS
8192 COLUMNS
COLUMN I/O CIRCUITS
COLCUOMLUNMN ADDRESS
ADDRE^DS^ES^CODERS
DECODERS
COLUMN INPUT BUFFERS
16 18 19 20 21 22 28 29 30 31 32
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
address
inputs
MITSUBISHI
ELECTRIC
7 DQ1
10 DQ2
23 ^DQ3
26 DQ4
data
inputs/
outputs
8
VCC (5V)
24
9
GND (0V)
25
1