M54974P Datasheet, PDF (1/6 Pages) Mitsubishi Electric Semiconductor – Bi-CMOS 12-BIT SERIAL-INPUT LATCHED DRIVER

MITSUBISHI <CONTROL / DRIVER IC>
M54974P
Bi-CMOS 12-BIT SERIAL-INPUT LATCHED DRIVER
DESCRIPTION
The M54974P is a semiconductor integrated circuit consisting of 12
stages of CMOS shift registers and latches with serial inputs and
serial or parallel outputs. It is based on Bi-CMOS process
technology, and has 12 bipolar drivers at the parallel outputs.
FEATURES
q Serial input and serial or parallel output
q Serial output enables cascade connection
q Built-in latch for each stage
q Enable input provides output control
q Low supply current (standby current ICC≤10µA)
q Serial I/O level is compatible with typical CMOS devices
q Driver features: High withstand voltage (BVCEO≥30V)
Capable of large drive currents (IO(max)=300mA)
q Wide operating temperature range Ta=-20 – +75°C
APPLICATION
Dot drivers for thermal print heads. Serial/parallel conversion.
Drivers for relay and solenoids.
FUNCTION
The M54974P consists of 12 stages of D-type flip flops connected
to 12 latches.
Data is input to serial input S-IN, and clock pulses are applied to
clock input T. When the clock changes from low to high, the input
data enters the first shift register and data already in the shift
BLOCK DIAGRAM
PIN CONFIGURATION (TOP VIEW)
Serial output S-OUT ← 1
Latch input LATCH → 2
Enable input
EN → 3
O12 ← 4
Parallel outputs
O11 ← 5
6
7
Driver GND P-GND
8
9
O10 ← ₁₀
Parallel outputs
O9 ← 11
O8 ← 12
O7 ← ₁₃
O6 ← 14
Logic power
28 L-VCC _supply
27 L-GND ^{Logic GND}
26 ← S-IN Serial input
25 ← T
24 P-VCC
23
Clock
Output power
supply
22
P-GND Driver GND
21
20
19 ^{→ O1}
18 → O2
17 → O3
16 ^{→ O4}
15 ^{→ O5}
Parallel outputs
Outline 28P4B
registers is shifted sequentially.
The serial output S-OUT is used to connect multiple M54974Ps to
expand the number of parallel outputs. S-OUT is connected to S-IN
of the next stage.
When the clock pulse changes from low to high, latch input
(LATCH) is high and output enable input (EN) is low the serial input
data at S-IN appears at output O1 and the other data already
Parallel outputs
O1 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 O12
19 18 17 16 15 14 13 12 11 10 5
4
P-GND
Driver GND
6
7
8
9
L-VCC
EN
Enable input
3
L-VCC
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
LATCH
Latch input
2
LD LD LD LD LD LD LD LD LD LD LD LD
S-IN
Serial input
26
DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ
T
T
T
T
T
T
T
T
T
T
T
T
T
Clock
25
20
21 _P-GND
22 ^{Driver GND}
23
24
P-VCC
Output
power
supply
L-VCC
23 _{Logic power supply}
27
L-GND
Logic GND
1
S-OUT
Serial output