M52757FP Datasheet, PDF (1/5 Pages) Mitsubishi Electric Semiconductor – WIDE BAND ANALOG SWITCH

MITSUBISHI ICs (Monitor)
M52757FP
WIDE BAND ANALOG SWITCH
DESCRIPTION
The M52757FP is a semiconductor integrated circuit for
the RGB interface. The device features switching signals
input from two types of image sources and outputting the
signals to the CRT display,etc. The frequency band of
video signals is 250MHz, acquiring high-resolution
images, and are optimum as an interface IC with high-
resolution CRT display and various new media.
It includes Sync-separator, Video-signal-detector, and
Sync-on G detector (SOG-DET.).
FEATURES
• Frequency band width : R.G.B ...................250MHz
• Input level : R.G.B...............................0.7Vp-p (Typ.)
• Video signal-detector
Responsive frequency............................... ~50MHz
Input level............................................0.7Vpp (Typ.)
Detected level......................................150mV (Typ.)
(Measure bottom to DET.level)
• Only the G channel is proveded with buffer video output.
• It is possible to save the consumption current by
stopping current supply to Pin 2,4,6,20,24,30,33,35
because SOG-DET can be operated with only Vcc5
(Pin 15) as power save mode.
• Include Sync Separation,Video signal detector, and
Sync-on G detector.
APPLICATION
Display monitor
PIN CONFIGURATION (TOP VIEW)
Input1 (R) 1
Vcc1 (R) 2
Input1 (G) 3
Vcc1 (G) 4
Input1 (B) 5
Vcc1 (B) 6
Input2 (R) 7
GND1 8
Input2(G) 9
GND5 10
Input2 (B) ¹¹
SyncDET1 ¹²
SyncDET2 ¹³
S-DETout 14
Vcc5 15
VideoDET-Hold ¹⁶
V-DETout 17
SWITCH ¹⁸
36 VCC2 (R)
35 OUTPUT (R)
34 GND2(R)
33 Vcc2(G)
32 OUTPUT(G)
31 _{GND2 (G)}
30 _{Vcc2 (B)}
29 OUTPUT(B)
28 _CND2(B)
27 _{G Buffer out}
26 _{Sync SEP in}
25 _{Sync SEP out}
24 _Vcc3
23 _{V-DET in3}
22 _GND4
21 _{V-DET in2}
20 _Vcc4
19 _{V-DET in1}
Outline: 36P2R-D
RECOMMENDED OPERATING CONDITION
Suply voltage range 4.75~5.5V
Rated voltage
5.0V
BLOCK DIAGRAM
Vcc2(R)
OUTPUT(R)
Vcc2(G)
OUTPUT(G)
Vcc2(B)
OUTPUT(B)
Sync SEP in
Sync SEP out
G Buffer out
(for Sync on G)
Vcc3
V-DET in 3
V-DET in 2
V-DET in 1
Vcc4
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
G _Sync
R
G
B
sepa
OR
POWER
SAVE
Vcc(5V)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Vcc1(R)
Vcc1(G)
Vcc1(B)
INPUT1(R)
INPUT1(G)
INPUT1(B)
INPUT2(R)
INPUT2(G)
SyncDET2
INPUT2(B) SyncDET1
S-DET
OUT
Vcc5
V-DET out
VideoDET-Hold
SW GND : INPUT1
SW OPEN : INPUT2
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